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PL133-37TC

Public Made by Adom

by adom

Microchip Tech Clock Buffers, Drivers, SOT-23-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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PL133-37TC

Microchip Tech · Clock Buffers, Drivers · SOT-23-6

PL133-37TC from Microchip Tech, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CLK1 output Inverted LVCMOS output clock with 12 mA drive strength, same frequency as the reference input.
2 GND power_in Ground connection.
3 FIN input Reference clock input accepting LVCMOS or sine wave, 1 MHz to 150 MHz, internally AC-coupled.
4 CLK0 output Inverted LVCMOS output clock with 12 mA drive strength, same frequency as the reference input.
5 VDD power_in Power supply, 1.62V to 3.63V operating range (absolute maximum 4.6V), decoupled with 0.1 µF placed close to the pin.
6 CLK2 output Inverted LVCMOS output clock with 12 mA drive strength, same frequency as the reference input.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package SOT-23-6
Category Clock and Timing
Pins 6

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage VDD -0.5 4.6 V 2
DC Input Voltage VI -0.5 4.6 V -0.5V to VDD + 0.5V (max value computed from VDD absolute maximum) 2
Storage Temperature TS -65 150 °C 2
Operating Voltage VDD 1.62 3.63 V 2
Input Frequency fIN 1 150 MHz 2.5V and 3.3V operation 2
Input Frequency fIN 1 100 MHz 1.8V operation 2
Input Signal Amplitude fIN 0.8 VPP Internally AC-coupled, ≤150 MHz, VDD = 2.5V and 3.3V 2
Input Signal Amplitude fIN 0.5 VPP Internally AC-coupled, ≤100 MHz, All VDDs 2
Input Signal Amplitude fIN 0.1 VPP Internally AC-coupled, 3.3V ≤50 MHz, 2.5V ≤40 MHz, 1.8V ≤15 MHz, 2
Output Enable Time tEN 10 ns OE function, TA = +25°C, 15 pF load 2
Output Rise Time tr 2 3 ns 15 pF load, 10/90% VDD, 3.3V 2
Output Fall Time tf 2 3 ns 15 pF load, 10/90% VDD, 3.3V 2
Duty Cycle 45 50 55 % Input duty cycle is 50% 2
Output-to-Output Skew tOOSK 250 ps All outputs equally loaded 2
Output Low Voltage VOL 0.4 V IOL = 12 mA, VDD = 3.3V 2
Output High Voltage VOH 2.4 V IOL = -12 mA, VDD = 3.3V 2
Output Current IOSD 12 mA VOL = 0.4V, VOH = 2.4V, VDD = 3.3V 2
Supply Current, Dynamic IDD 1.2 mA VDD = 3.3V, 25 MHz, no load 2
Supply Current, Dynamic IDD 0.9 mA VDD = 2.5V, 25 MHz, no load 2
Supply Current, Dynamic IDD 0.6 mA VDD = 1.8V, 25 MHz, no load 2
Supply Current, Standby IDD_SB 0.3 mA OE pin pulled low, VDD = 3.3V 2
Additive Phase Jitter tJITTER 70 fs VDD = 3.3V, Frequency = 26 MHz, Offset = 12 kHz ~ 5 MHz 3
Additive Phase Jitter tJITTER 80 fs VDD = 3.3V, Frequency = 100 MHz, Offset = 12 kHz ~ 20 MHz 3
Operating Temperature Range (Commercial) 0 70 °C C = 0°C to +70°C temperature range 9

CAD (KiCad official)

  • Symbol: PL133-37TC
  • Footprint: Package_TO_SOT_SMD:SOT-23-6
  • 3D model: SOT-23-6 (KiCad packages3D, STEP)
  • 3D model files: pl133-37tc-etched.step / pl133-37tc-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pl133-37tc.step / pl133-37tc.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (11 pp, sha256 d239b0d105036819, retrieved 2026-10-27, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF