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PJMG60P60TE

PJSEMI · MOSFETs · TO-252

PJMG60P60TE from PJSEMI, in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Gate input Gate terminal of the P-channel MOSFET; gate-source voltage rated at ±20 V maximum.
2 Drain passive Drain terminal; drain-source voltage rated at -60 V and continuous drain current -60 A.
3 Source passive Source terminal of the P-channel MOSFET; body diode forward current rated at -60 A.

Key specifications

Parameter Value
Manufacturer PJSEMI
Package TO-252
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Breakdown Voltage -V(BR)DSS 60 V VGS=0V,ID=-250μA 2
Zero Gate Voltage Drain Current -IDSS 1 μA VDS=-60V,VGS=0V 2
Gate-Body Leakage Current IGSS -100 100 nA VGS=±20V,VDS=0V 2
Gate Threshold Voltage -VGS(th) 1 1.8 2.5 V VDS=VGS,ID=-250μA 2
Drain-Source On-Resistance RDS(on) 11 16 mΩ VGS=-10V,ID=-20A 2
Drain-Source On-Resistance RDS(on) 14 20 mΩ VGS=-4.5V,ID=-10A 2
Diode Forward Voltage -VSD 1.2 V VGS=0V,IS=-30A 2
Diode Forward Current -IS 60 A 2
Drain-Source Voltage -VDS 60 V 25℃ case temperature 1
Gate-Source Voltage VGS -20 20 V 25℃ case temperature 1
Drain Current-Continuous -ID 60 A 25℃ case temperature 1
Drain Current-Pulsed -IDM 220 A Note1: pulse width limited by maximum junction temperature 1
Maximum Power Dissipation PD 100 W 25℃ case temperature 1
Single Pulse Avalanche Energy EAS 176 mJ TJ=25℃,VDD=-30V,VG=-10V,RG=25Ω,L=0.5mH,IAS=-26.5A 1
Junction Temperature TJ 150 °C 1
Storage Temperature Range TSTG -55 150 °C 1
Thermal Resistance, Junction-to-Case RθJC 1.25 °C/W 1
Forward Transconductance gFS 9 S VDS=-5V,ID=-2A 2
Input Capacitance Ciss 2634 pF VDS=-30V,VGS=0V,f=1MHz 2
Output Capacitance Coss 506 pF VDS=-30V,VGS=0V,f=1MHz 2
Reverse Transfer Capacitance Crss 22 pF VDS=-30V,VGS=0V,f=1MHz 2
Gate Resistance Rg 11.5 Ω VDS=0V,VGS=0V,f=1MHz 2
Total Gate Charge Qg 38 nC VDS=-30V,ID=-10A,VGS=-10V 2
Gate-Source Charge Qgs 6.9 nC VDS=-30V,ID=-10A,VGS=-10V 2
Gate-Drain Charge Qgd 4.98 nC VDS=-30V,ID=-10A,VGS=-10V 2
Turn-on Delay Time td(on) 20 nS VDD=-30V,ID=-10A,VGS=-10V,RGEN=3Ω 2
Turn-on Rise Time tr 25 nS VDD=-30V,ID=-10A,VGS=-10V,RGEN=3Ω 2
Turn-off Delay Time td(off) 60 nS VDD=-30V,ID=-10A,VGS=-10V,RGEN=3Ω 2
Turn-off Fall Time tf 30 nS VDD=-30V,ID=-10A,VGS=-10V,RGEN=3Ω 2

CAD (KiCad official)

  • Symbol: PJMG60P60TE
  • Footprint: Package_TO_SOT_SMD:TO-252-2
  • 3D model: TO-252 (KiCad packages3D, STEP)
  • 3D model files: pjmg60p60te-etched.step / pjmg60p60te-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pjmg60p60te.step / pjmg60p60te.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: PJSEMI datasheet (8 pp, sha256 aad046f72de9eea7, retrieved 2026-10-22, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF