component
PJM80N68TE
Public Made by Adomby adom
PJSEMI MOSFETs, TO-252. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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PJM80N68TE
PJSEMI · MOSFETs · TO-252
PJM80N68TE from PJSEMI, in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Gate | input | Gate terminal of the N-channel enhancement mode MOSFET. Controls the drain-source conduction; VGS(th) typ 2.8V (min 2V, max 4V). Absolute maximum VGS is ±20V. |
| 2 | Drain | passive | Drain terminal of the N-channel MOSFET. Rated VDS=68V, ID=80A continuous (IDM=320A pulsed). RDS(on) typ 7.5mΩ / max 8.6mΩ @VGS=10V, ID=30A. Also electrically connected to the TO-252 tab. |
| 3 | Source | passive | Source terminal of the N-channel MOSFET. Body-diode forward voltage VSD max 1.2V @IS=30A, VGS=0V; continuous IS up to 80A. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | PJSEMI |
| Package | TO-252 |
| Category | Transistors/Thyristors |
| Pins | 3 |
Ordering variants
Same part, different packaging or reel option.
PJM80N68TE
CAD (KiCad official)
- Symbol:
PJM80N68TE - Footprint:
Package_TO_SOT_SMD:TO-252-2 - 3D model: TO-252 (KiCad packages3D, STEP)
- 3D model files:
pjm80n68te-etched.step/pjm80n68te-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pjm80n68te.step/pjm80n68te.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: PJSEMI datasheet (None pp, sha256
9ed7f9abaeec235a, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# PJM80N68TE
**PJSEMI** · MOSFETs · TO-252
PJM80N68TE from PJSEMI, in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Gate | input | Gate terminal of the N-channel enhancement mode MOSFET. Controls the drain-source conduction; VGS(th) typ 2.8V (min 2V, max 4V). Absolute maximum VGS is ±20V. |
| 2 | Drain | passive | Drain terminal of the N-channel MOSFET. Rated VDS=68V, ID=80A continuous (IDM=320A pulsed). RDS(on) typ 7.5mΩ / max 8.6mΩ @VGS=10V, ID=30A. Also electrically connected to the TO-252 tab. |
| 3 | Source | passive | Source terminal of the N-channel MOSFET. Body-diode forward voltage VSD max 1.2V @IS=30A, VGS=0V; continuous IS up to 80A. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | PJSEMI |
| Package | TO-252 |
| Category | Transistors/Thyristors |
| Pins | 3 |
## Ordering variants
Same part, different packaging or reel option.
- `PJM80N68TE`
## CAD (KiCad official)
- Symbol: `PJM80N68TE`
- Footprint: `Package_TO_SOT_SMD:TO-252-2`
- 3D model: TO-252 (KiCad packages3D, STEP)
- 3D model files: `pjm80n68te-etched.step` / `pjm80n68te-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `pjm80n68te.step` / `pjm80n68te.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [PJSEMI datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603548503264686080) (None pp, sha256 `9ed7f9abaeec235a`, retrieved 2026-08-17, tier: lcsc)
- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/pjm80n68te-datasheet.pdf)