# PJM10H05PPA

**PJSEMI** · MOSFETs · SOP-8

PJM10H05PPA from PJSEMI, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Source | passive | Source terminal of the P-channel MOSFET; pins 1, 2 and 3 are tied together internally as Source, and the absolute maximum drain-source voltage is -VDS 100 V. |
| 2 | Source | passive | Source terminal of the P-channel MOSFET; pins 1, 2 and 3 are tied together internally as Source, and the continuous drain current rating is 5 A. |
| 3 | Source | passive | Source terminal of the P-channel MOSFET; pins 1, 2 and 3 are tied together internally as Source, and the gate-source voltage limit is ±20 V. |
| 4 | Gate | input | Gate terminal that controls the MOSFET; the datasheet gives VGS of ±20 V absolute maximum and a gate threshold of 1.0 to 2.5 V at ID = -250 μA. |
| 5 | Drain | passive | Drain terminal of the MOSFET; pins 5, 6, 7 and 8 are tied together internally as Drain, rated for -VDS 100 V and 5 A continuous drain current. |
| 6 | Drain | passive | Drain terminal of the MOSFET; pins 5, 6, 7 and 8 are tied together internally as Drain, rated for -VDS 100 V and 5 A continuous drain current. |
| 7 | Drain | passive | Drain terminal of the MOSFET; pins 5, 6, 7 and 8 are tied together internally as Drain, rated for -VDS 100 V and 5 A continuous drain current. |
| 8 | Drain | passive | Drain terminal of the MOSFET; pins 5, 6, 7 and 8 are tied together internally as Drain, rated for -VDS 100 V and 5 A continuous drain current. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | PJSEMI |
| Package | SOP-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | -VDS |  |  | 100 | V |  | 1 |
| Gate-Source Voltage | VGS | -20 |  | 20 | V |  | 1 |
| Drain Current-Continuous | -ID |  |  | 5 | A |  | 1 |
| Drain Current-Pulsed | -IDM |  |  | 12 | A | Repetitive; pulse width limited by maximum junction temperature (Note 1) | 1 |
| Maximum Power Dissipation | PD |  |  | 1.9 | W |  | 1 |
| Single Pulse Avalanche Energy | EAS |  |  | 20 | mJ | TJ=25℃,VDD=-50V, VG=-10V, RG=25Ω, L=0.5mH, IAS=-9A (Note 2) | 1 |
| Junction Temperature | TJ |  |  | 150 | °C |  | 1 |
| Storage Temperature Range | TSTG | -55 |  | 150 | °C |  | 1 |
| Thermal Resistance, Junction-to-Ambient | RθJA |  |  | 66 | °C/W | Surface mounted on FR4 board, t ≤ 10 sec (Note 3) | 1 |
| Drain-Source Breakdown Voltage | -V(BR)DSS | 100 |  |  | V | VGS=0V,ID=-250μA | 2 |
| Zero Gate Voltage Drain Current | -IDSS |  |  | 1 | μA | VDS=-100V,VGS=0V | 2 |
| Gate-Body Leakage Current | IGSS | -100 |  | 100 | nA | VGS=±20V,VDS=0V | 2 |
| Gate Threshold Voltage (Note 4) | -VGS(th) | 1 | 1.8 | 2.5 | V | VDS=VGS,ID=-250μA | 2 |
| Drain-Source On-Resistance (Note 4) | RDS(on) |  | 276 | 350 | mΩ | VGS=-10V,ID=-2A | 2 |
| Drain-Source On-Resistance (Note 4) | RDS(on) |  | 291 | 400 | mΩ | VGS=-4.5V,ID=-1A | 2 |
| Diode Forward Voltage (Note 4) | -VSD |  |  | 1.2 | V | VGS=0V,IS=-5A | 2 |
| Diode Forward Current (Note 3) | -IS |  |  | 5 | A |  | 2 |
| Forward Transconductance (Note 4) | gFS |  | 8 |  | S | VDS=-5V,ID=-3A | 2 |
| Input Capacitance | Ciss |  | 1192 |  | pF | VDS=-25V,VGS=0V,f=1MHz | 2 |
| Output Capacitance | Coss |  | 43 |  | pF | VDS=-25V,VGS=0V,f=1MHz | 2 |
| Reverse Transfer Capacitance | Crss |  | 31 |  | pF | VDS=-25V,VGS=0V,f=1MHz | 2 |
| Gate Resistance | RG |  | 5.8 |  | Ω | VDS=0V,VGS=0V,f=1MHz | 2 |
| Total Gate Charge | Qg |  | 20 |  | nC | VDS=-50V,ID=-2A,VGS=-10V | 2 |
| Gate-Source Charge | Qgs |  | 4.7 |  | nC | VDS=-50V,ID=-2A,VGS=-10V | 2 |
| Gate-Drain Charge | Qgd |  | 6.5 |  | nC | VDS=-50V,ID=-2A,VGS=-10V | 2 |
| Turn-on Delay Time | td(on) |  | 10 |  | nS | VDD=-50V, ID=-2A, VGS=-10V,RGEN=3Ω | 2 |
| Turn-on Rise Time | tr |  | 8 |  | nS | VDD=-50V, ID=-2A, VGS=-10V,RGEN=3Ω | 2 |
| Turn-off Delay Time | td(off) |  | 31 |  | nS | VDD=-50V, ID=-2A, VGS=-10V,RGEN=3Ω | 2 |
| Turn-off Fall Time | tf |  | 9 |  | nS | VDD=-50V, ID=-2A, VGS=-10V,RGEN=3Ω | 2 |

## CAD (KiCad official)

- Symbol: `PJM10H05PPA`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `pjm10h05ppa-etched.step` / `pjm10h05ppa-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `pjm10h05ppa.step` / `pjm10h05ppa.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [PJSEMI datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603392351926558720) (6 pp, sha256 `b1dcaf37ab7f7d9a`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/pjm10h05ppa-datasheet.pdf)