Loads when you scroll to it. Unloads after 5 minutes in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

PCB Footprint

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Loads when you scroll to it. Unloads after 5 minutes in the background.
Download PDF
Contents

README

markdown

PJM08P40PA

PJSEMI · MOSFETs · SOP-8

PJM08P40PA from PJSEMI, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Source passive Source terminal of the P-channel MOSFET; the pin description assigns pins 1, 2 and 3 to Source.
2 Source passive Source terminal of the P-channel MOSFET; the pin description assigns pins 1, 2 and 3 to Source.
3 Source passive Source terminal of the P-channel MOSFET; the pin description assigns pins 1, 2 and 3 to Source.
4 Gate input Gate terminal of the MOSFET; the gate-source voltage is rated at ±20 V (VGS).
5 Drain passive Drain terminal of the MOSFET; rated at -VDS 40 V and continuous drain current 8 A.
6 Drain passive Drain terminal of the MOSFET; rated at -VDS 40 V and continuous drain current 8 A.
7 Drain passive Drain terminal of the MOSFET; rated at -VDS 40 V and continuous drain current 8 A.
8 Drain passive Drain terminal of the MOSFET; rated at -VDS 40 V and continuous drain current 8 A.

Key specifications

Parameter Value
Manufacturer PJSEMI
Package SOP-8
Category Transistors/Thyristors
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage -VDS 40 V 1
Gate-Source Voltage VGS -20 20 V 1
Drain Current-Continuous -ID 8 A 1
Drain Current-Pulsed -IDM 30 A 1
Maximum Power Dissipation PD 1.8 W 1
Single Pulse Avalanche Energy EAS 42 mJ VDD=-30V, VG=-10V, L=0.5mH, IAS=-13A, RG=25Ω, TJ=25℃ 1
Junction Temperature TJ 150 °C 1
Storage Temperature Range TSTG -55 150 °C 1
Thermal Resistance, Junction-to-Ambient RθJA 69 °C/W Surface mounted on FR4 board, t ≤ 10 sec 1
Drain-Source Breakdown Voltage -V(BR)DSS 40 V VGS=0V, ID=-250μA 2
Zero Gate Voltage Drain Current -IDSS 1 μA VDS=-40V, VGS=0V 2
Gate-Body Leakage Current IGSS -100 100 nA VGS=±20V, VDS=0V 2
Gate Threshold Voltage -VGS(th) 1 1.6 2.5 V VDS=VGS, ID=-250μA 2
Drain-Source On-Resistance RDS(on) 25 35 mΩ VGS=-10V, ID=-8A 2
Drain-Source On-Resistance RDS(on) 32 45 mΩ VGS=-4.5V, ID=-8A 2
Diode Forward Voltage -VSD 1.2 V VGS=0V, IS=-8A 2
Diode Forward Current -IS 8 A 2
Forward Transconductance gFS 6 S VDS=-5V, ID=-1A 2
Input Capacitance Ciss 1392 pF VDS=-20V, VGS=0V, f=1MHz 2
Output Capacitance Coss 116 pF VDS=-20V, VGS=0V, f=1MHz 2
Reverse Transfer Capacitance Crss 98 pF VDS=-20V, VGS=0V, f=1MHz 2
Total Gate Charge Qg 11.5 nC VDS=-15V, ID=-1A, VGS=-4.5V 2
Gate-Source Charge Qgs 3.5 nC VDS=-15V, ID=-1A, VGS=-4.5V 2
Gate-Drain Charge Qgd 3.3 nC VDS=-15V, ID=-1A, VGS=-4.5V 2
Turn-on Delay Time td(on) 22 nS VDD=-15V, ID=-1A, VGS=-10V, RGEN=3.3Ω 2
Turn-on Rise Time tr 15.7 nS VDD=-15V, ID=-1A, VGS=-10V, RGEN=3.3Ω 2
Turn-off Delay Time td(off) 59 nS VDD=-15V, ID=-1A, VGS=-10V, RGEN=3.3Ω 2
Turn-off Fall Time tf 5.5 nS VDD=-15V, ID=-1A, VGS=-10V, RGEN=3.3Ω 2
Gate Resistance Rg 12 Ω VDS=0V, VGS=0V, f=1MHz 2

CAD (KiCad official)

  • Symbol: PJM08P40PA
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: pjm08p40pa-etched.step / pjm08p40pa-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pjm08p40pa.step / pjm08p40pa.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: PJSEMI datasheet (5 pp, sha256 a28833b0cfccaa1f, retrieved 2026-10-17, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF