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PJM07P30PA

PJSEMI · MOSFETs · SOP-8

PJM07P30PA from PJSEMI, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Source passive Source terminal of the P-channel MOSFET, bonded together with pins 2 and 3 (pins 1,2,3 are Source).
2 Source passive Source terminal of the P-channel MOSFET, bonded together with pins 1 and 3 (pins 1,2,3 are Source).
3 Source passive Source terminal of the P-channel MOSFET, bonded together with pins 1 and 2 (pins 1,2,3 are Source).
4 Gate input Gate terminal that controls the P-channel MOSFET; gate-source voltage is rated at ±20 V.
5 Drain passive Drain terminal of the P-channel MOSFET, bonded together with pins 6, 7 and 8 (pins 5,6,7,8 are Drain).
6 Drain passive Drain terminal of the P-channel MOSFET, bonded together with pins 5, 7 and 8 (pins 5,6,7,8 are Drain).
7 Drain passive Drain terminal of the P-channel MOSFET, bonded together with pins 5, 6 and 8 (pins 5,6,7,8 are Drain).
8 Drain passive Drain terminal of the P-channel MOSFET, bonded together with pins 5, 6 and 7 (pins 5,6,7,8 are Drain).

Key specifications

Parameter Value
Manufacturer PJSEMI
Package SOP-8
Category Transistors/Thyristors
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Breakdown Voltage -V(BR)DSS 30 V VGS=0V,ID=-250μA 2
Zero Gate Voltage Drain Current -IDSS 1 μA VDS=-30V,VGS=0V 2
Gate-Body Leakage Current IGSS -100 100 nA VGS=±20V,VDS=0V 2
Gate Threshold Voltage -VGS(th) 1 1.6 2.5 V VDS=VGS,ID=-250μA 2
Drain-Source On-Resistance at VGS=-10V RDS(on) 22 28 mΩ VGS=-10V, ID=-7A 2
Drain-Source On-Resistance at VGS=-4.5V RDS(on) 35 50 mΩ VGS=-4.5V, ID=-4A 2
Diode Forward Voltage -VSD 1.2 V VGS=0V,IS=-7A 2
Diode Forward Current -IS 7 A 2
Drain-Source Voltage -VDS 30 V 1
Gate-Source Voltage VGS -20 20 V 1
Drain Current-Continuous -ID 7 A 1
Drain Current-Pulsed -IDM 28 A Note1 1
Maximum Power Dissipation PD 3 W 1
Single Pulse Avalanche Energy EAS 20 mJ Note2 1
Junction Temperature TJ 150 °C 1
Storage Temperature Range TSTG -55 150 °C 1
Thermal Resistance, Junction-to-Ambient RθJA 41.7 °C/W Note3 1
Input Capacitance Ciss 610 pF VDS=-15V,VGS=0V,f=1MHz 2
Output Capacitance Coss 116 pF VDS=-15V,VGS=0V,f=1MHz 2
Reverse Transfer Capacitance Crss 93.5 pF VDS=-15V,VGS=0V,f=1MHz 2
Gate Resistance Rg 15.8 Ω VDS=0V,VGS=0V,f=1MHz 2
Forward Transconductance gFS 4.7 S VDS=-5V,ID=-1A 2
Total Gate Charge Qg 51 nC VDS=-15V, ID=-8A, VGS=-10V 2
Gate-Source Charge Qgs 9.8 nC VDS=-15V, ID=-8A, VGS=-10V 2
Gate-Drain Charge Qgd 8.2 nC VDS=-15V, ID=-8A, VGS=-10V 2
Turn-on Delay Time td(on) 13 nS VDD=-15V, ID=-1A, VGS=-10V, RGEN=6Ω 2
Turn-on Rise Time tr 15 nS VDD=-15V, ID=-1A, VGS=-10V, RGEN=6Ω 2
Turn-off Delay Time td(off) 198 nS VDD=-15V, ID=-1A, VGS=-10V, RGEN=6Ω 2
Turn-off Fall Time tf 98 nS VDD=-15V, ID=-1A, VGS=-10V, RGEN=6Ω 2

CAD (KiCad official)

  • Symbol: PJM07P30PA
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: pjm07p30pa-etched.step / pjm07p30pa-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pjm07p30pa.step / pjm07p30pa.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: PJSEMI datasheet (7 pp, sha256 b2aa18eec42be2f3, retrieved 2026-10-27, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF