component
PJ9650M33DE
Public Made by Adomby adom
PJSEMI Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, DFN-4L(1x1). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownPJ9650M33DE
PJSEMI · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · DFN-4L(1x1)
PJ9650M33DE from PJSEMI, in a DFN-4L(1x1). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VOUT | power_out | Regulated output voltage (3.3V fixed for this MPN), supplies up to 600mA and needs at least a 1uF capacitor to ground for stability. |
| 2 | GND | power_in | Ground pin. |
| 3 | EN | input | Chip enable, active high and high impedance; logic low is 0.4V max and logic high is 1V min. |
| 4 | VIN | power_in | Power input voltage, operating range 1.7V to 7V (8.5V absolute maximum), with a 1uF input capacitor recommended. |
| 5 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | PJSEMI |
| Package | DFN-4L(1x1) |
| Category | Power Management (PMIC) |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage | VIN | 1.7 | 7 | V | 9 | ||
| Output Voltage Accuracy | ΔVOUT | -2 | 2 | % | VIN=VOUT+1V, 1mA<IOUT<30mA | 9 | |
| Quiescent Current | IQ | 50 | 75 | μA | IOUT=0mA | 9 | |
| Max. Output Current | IOUT (Max.) | 600 | mA | VIN-VOUT=1V | 9 | ||
| Dropout Voltage | VDROP | 300 | 500 | mV | VOUT=3.3V, IOUT=600mA | 9 | |
| Line Regulation | ΔVLINE | 0.02 | 0.1 | %/V | IOUT=1mA | 9 | |
| Load Regulation | ΔVLOAD | 15 | 30 | mV | 0mA≤IOUT≤600mA | 9 | |
| Current Limit | ILIM | 0.7 | 0.75 | A | 9 | ||
| Standby Current | 1 | μA | EN=0 | 9 | |||
| EN Logic Low Threshold | VCEL | 0.4 | V | EN Low Voltage | 9 | ||
| EN Logic High Threshold | VCEH | 1 | V | EN High Voltage | 9 | ||
| Output Voltage Temperature Coefficient | TCVOUT | -100 | 100 | ppm/°C | 9 | ||
| OTP | OTP | 130 | 150 | 170 | °C | 9 | |
| Short Circuit Current | ISHORT | 250 | mA | 9 | |||
| Power Supply Rejection Rate | PSRR | 75 | dB | VIN=VOUT+0.5V, f=1KHz, IOUT=10mA | 9 | ||
| Startup Time | tstart | 80 | µS | 9 | |||
| OTP Hysteresis | 40 | °C | 9 | ||||
| Supply Voltage | 1.7 | 7 | V | 8 | |||
| Maximum Output Current | 600 | mA | 8 | ||||
| Operating Ambient Temperature | -40 | 125 | °C | 8 | |||
| Max Input Voltage | 8.5 | V | 8 | ||||
| Output Current | 600 | mA | 8 | ||||
| Power Dissipation | PD | 550 | mW | DFN1x1-4L | 8 | ||
| Junction Temperature | 150 | °C | 8 | ||||
| Storage Temperature Range | -40 | 150 | °C | 8 | |||
| Lead Temperature&Time | 260 | °C | 10S | 8 | |||
| Thermal Resistance, Junction-to-Ambient | RθJA | 180 | °C/W | DFN1x1-4L | 8 |
CAD (KiCad official)
- Symbol:
PJ9650M33DE - Footprint:
Package_DFN_QFN:UDFN-4-1EP_1x1mm_P0.65mm_EP0.48x0.48mm - 3D model: DFN-4L(1x1) (KiCad packages3D, STEP)
- 3D model files:
pj9650m33de-etched.step/pj9650m33de-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pj9650m33de.step/pj9650m33de.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: PJSEMI datasheet (20 pp, sha256
73c7e74397bbc610, retrieved 2026-10-22, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).