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Generated by kicad-footprint-generator · KiCad file format 20260206

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PJ9500M33SE

PJSEMI · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5

PJ9500M33SE from PJSEMI, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VIN	power_in	Power input for the LDO, specified for a 1.8 V to 6 V supply range (absolute maximum VIN is -0.3 V to 6 V), with a 1 µF ceramic input capacitor recommended close to the device.
2	GND	power_in	Ground reference for the regulator; the datasheet calls for a wide copper trace on both VIN and GND for PCB layout.
3	EN	input	Active-high chip enable: the regulator turns on above VIH (1.2 V minimum) and off below VIL (0.9 V maximum), and the pin is internally pulled low to GND through 1 MΩ.
4	NC	unconnected	No connection; the datasheet assigns no function to this pin.
5	VOUT	power_out	Regulated output rated for up to 500 mA, requiring a 1 µF to 10 µF X7R/X5R output capacitor with 5 mΩ to 500 mΩ ESR placed close to the OUT and GND pins for stability.

Key specifications

Parameter	Value
Manufacturer	PJSEMI
Package	SOT-23-5
Category	Power Management (PMIC)
Pins	5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Input Voltage	VIN	1.8		6	V		7
Output Voltage Accuracy	ΔVOUT	-2		2	%	VIN=5V, IOUT=10mA	7
Line Regulation	ΔVLINE		1	3	mV	VIN=(VOUT+2V)~7V, IOUT=1mA	7
Load Regulation	ΔVLOAD		0.1	0.2	mV/mA	VOUT=4V, IOUT=1~200mA	7
Short Circuit Current	ISHORT		120	150	mA	VEN=VIN, VOUT short to GND	7
EN Input Threshold Logic Low	VIL			0.9	V		7
EN Input Threshold Logic High	VIH	1.2			V		7
Supply Voltage		1.8		6	V		6
Maximum Output Current				500	mA		6
Operating Ambient Temperature		-40		125	°C		6
VIN to GND Voltage	VIN	-0.3		6	V		6
VEN to GND Voltage	VEN	-0.3		6	V		6
VOUT to VIN Voltage		-0.3		5	V		6
Maximum Load Current				500	mA		6
Power Dissipation				250	mW	SOT-23-5	6
Operating Ambient Temperature		-40		125	°C		6
Storage Temperature Range		-40		150	°C		6
Lead Temperature				300	°C	10S	6
ESD Voltage HBM				4	KV	HBM	6
ESD Voltage CDM				200	V	CDM	6
Thermal Resistance, Junction-to-Ambient			400		°C/W	SOT-23-5	6

CAD (KiCad official)

Symbol: PJ9500M33SE
Footprint: Package_TO_SOT_SMD:SOT-23-5
3D model: SOT-23-5 (KiCad packages3D, STEP)
3D model files: pj9500m33se-etched.step / pj9500m33se-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pj9500m33se.step / pj9500m33se.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: PJSEMI datasheet (16 pp, sha256 d7709c00ce45adff, retrieved 2026-10-18, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF