component
PJ9500M15SE
Public Made by Adomby adom
PJSEMI Linear Voltage Regulators (LDO), SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownPJ9500M15SE
PJSEMI · Linear Voltage Regulators (LDO) · SOT-23-5
PJ9500M15SE from PJSEMI, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Power input voltage, operating range 1.8V to 6V (absolute maximum 6V), with a 1µF ceramic capacitor recommended to GND placed close to the pin. |
| 2 | GND | power_in | Ground. |
| 3 | EN | input | Active-high chip enable, high impedance and internally pulled low by 1MΩ to GND, on above VIH 1.2V min and off below VIL 0.9V max, tie to VIN if unused. |
| 4 | NC | unconnected | No connection. |
| 5 | VOUT | power_out | Regulated output voltage (1.5V for PJ9500M15SE) with up to 500mA load current and a 1µF to 10µF output capacitor required for stability. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | PJSEMI |
| Package | SOT-23-5 |
| Category | Power Management |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage | VIN | 1.8 | 6 | V | 7 | ||
| Output Voltage Accuracy | ∆VOUT | -2 | 2 | % | VIN=5V, IOUT=10mA | 7 | |
| Line Regulation | ∆VLINE | 1 | 3 | mV | VIN=(VOUT+2V)~7V, IOUT=1mA | 7 | |
| Load Regulation | ∆VLOAD | 0.1 | 0.2 | mV/mA | VOUT=4V, IOUT=1~200mA | 7 | |
| Short Circuit Current | ISHORT | 120 | 150 | mA | VEN=VIN, VOUT Short to GND | 7 | |
| EN Logic Low Threshold | VIL | 0.9 | V | 7 | |||
| EN Logic High Threshold | VIH | 1.2 | V | 7 | |||
| Supply Voltage | 1.8 | 6 | V | 6 | |||
| Maximum Output Current | 500 | mA | 6 | ||||
| Operating Ambient Temperature | -40 | 125 | °C | 6 | |||
| VIN to GND Voltage | VIN | -0.3 | 6 | V | 6 | ||
| VEN to GND Voltage | VEN | -0.3 | 6 | V | 6 | ||
| VOUT to VIN Voltage | -0.3 | 5 | V | 6 | |||
| Maximum Load Current | 500 | mA | 6 | ||||
| Power Dissipation SOT-23-5 | 250 | mW | SOT-23-5 | 6 | |||
| Operating Ambient Temperature | -40 | 125 | °C | 6 | |||
| Storage temperature range | -40 | 150 | °C | 6 | |||
| Thermal Resistance, Junction-to-Ambient SOT-23-5 | 400 | °C/W | SOT-23-5 | 6 | |||
| Quiescent Current | IQ | 800 | nA | VIN=5.0V, IOUT=0A | 7 | ||
| Maximum Output Current | IOUT_Max | 500 | mA | 7 | |||
| Dropout Voltage | VDROP | 190 | mV | VIN=0.98*VOUT, IOUT=100mA, VOUT=1.5V | 7 | ||
| Current Limit | ILIMIT | 700 | mA | VIN=VOUT+1V | 7 | ||
| Thermal Shutdown Temperature | TSHDN | 129 | °C | Shutdown, Temp increasing | 7 | ||
| Thermal Reset Temperature | 105 | °C | Reset, Temp decreasing | 7 | |||
| Power Supply Rejection Rate | PSRR | 60 | dB | VIN=5V, IOUT=10mA,f=1 KHz | 7 | ||
| Output Noise Voltage | eN | 66 | μVRMS | VIN= 5V, IOUT= 300mA, f=10Hz to100KHz, (VOUT=3.3V), COUT=1μF | 7 |
CAD (KiCad official)
- Symbol:
PJ9500M15SE - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
pj9500m15se-etched.step/pj9500m15se-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pj9500m15se.step/pj9500m15se.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: PJSEMI datasheet (16 pp, sha256
4fe7abaca22a9004, retrieved 2026-10-22, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).