component

PJ9500M12SQ

Public Made by Adom

by adom

PJSEMI Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-89. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management (pmic)pj9500m12sqfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Made with KiCad 10.0 · needs KiCad 10.0 or later to open · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 3h ago
viewers pj9500m12sq: viewers · Ray 3h ago
package.json Publish 0.1.0 · Ray 3h ago
page.json Set visibility: public · Ray 3h ago
pj9500m12sq-etched.glb Publish 0.1.0 · Ray 3h ago
pj9500m12sq-etched.step pj9500m12sq: factory component page (tier=lcsc) · Ray 3h ago
pj9500m12sq-hero.glb pj9500m12sq: hero GLB from the etched model (keeps the MPN mark) · Ray 3h ago
pj9500m12sq-hero.overlay.json Publish 0.1.0 · Ray 3h ago
pj9500m12sq.glb Publish 0.1.0 · Ray 3h ago
pj9500m12sq.kicad_mod Publish 0.1.0 · Ray 3h ago
pj9500m12sq.kicad_sym Publish 0.1.0 · Ray 3h ago
pj9500m12sq.lbr Publish 0.1.0 · Ray 3h ago
pj9500m12sq.step Publish 0.1.0 · Ray 3h ago
README.md Publish 0.1.0 · Ray 3h ago

PJ9500M12SQ

PJSEMI · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-89

PJ9500M12SQ from PJSEMI, in a SOT-89. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Ground reference pin of the regulator, to be connected to the system ground with a wide copper trace per the layout guidance.
2 VIN power_in Power input pin; the supply range is 1.8 V to 6 V, and a 1 µF input capacitor should be placed close to the device.
3 VOUT power_out Regulated output pin delivering up to 500 mA; the VOUT-to-VIN voltage is rated -0.3 V to 5 V.

Key specifications

Parameter Value
Manufacturer PJSEMI
Package SOT-89
Category Power Management (PMIC)
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Voltage VIN 1.8 6 V 7
Output Voltage Accuracy ΔVOUT -2 2 % VIN=5V, IOUT=10mA 7
Line Regulation ΔVLINE 1 3 mV VIN=(VOUT+2V)~7V, IOUT=1mA 7
Load Regulation ΔVLOAD 0.1 0.2 mV/mA VOUT=4V, IOUT=1~200mA 7
Short Circuit Current ISHORT 120 150 mA VEN=VIN, VOUT Short to GND 7
EN Input Threshold Logic Low VIL 0.9 V 7
EN Input Threshold Logic High VIH 1.2 V 7
VIN, VEN to GND Voltage (VIN) VIN -0.3 6 V 6
VEN to GND Voltage VEN -0.3 6 V 6
VOUT to VIN Voltage -0.3 5 V 6
Maximum Load Current 500 mA 6
Power Dissipation (SOT-89) 400 mW Package SOT-89 6
Thermal Resistance, Junction-to-Ambient (SOT-89) 250 °C/W Package SOT-89 6
Operating Ambient Temperature -40 125 °C 6
Storage Temperature Range -40 150 °C 6
Lead Temperature 300 °C 10 S 6
ESD Voltage HBM 4 KV HBM 6
ESD Voltage CDM 200 V CDM 6
Supply Voltage (recommended) 1.8 6 V 6
Maximum Output Current (recommended) 500 mA 6

CAD (KiCad official)

  • Symbol: PJ9500M12SQ
  • Footprint: Package_TO_SOT_SMD:SOT-89-3
  • 3D model: SOT-89 (KiCad packages3D, STEP)
  • 3D model files: pj9500m12sq-etched.step / pj9500m12sq-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pj9500m12sq.step / pj9500m12sq.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: PJSEMI datasheet (16 pp, sha256 d7709c00ce45adff, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF