component

PJ9350L18SA

Public Made by Adom

by adom

PJSEMI Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management (pmic)pj9350l18safactory-2.0.0extractor-text

Verified PJ9350L18SA

by Ray · last 5 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

5 Nov 2026RayPublished by the parts factory: tier lcsc, 3 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: PJ9350L18SA · SOT-23 · 3 pins
  • ✓copper: 3 copper pads, none touching another net
  • ✓datasheet: all 3 pin names found in the 18-page datasheet
  • •distributor (warn): no ['digikey', 'mouser'] number
  • ✓family: SOT-23
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-mfisfxh1/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 3 pins = 3 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 3 pins agree
  • ✓symbol_text: no pin names collide
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ pj9350l18sa.kicad_sym✓ pj9350l18sa.kicad_mod✓ pj9350l18sa.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 1d ago
viewers pj9350l18sa: viewers · Ray 1d ago
package.json Publish 0.1.0 · Ray 1d ago
page.json Set visibility: public · Ray 1d ago
pj9350l18sa-etched.glb Publish 0.1.0 · Ray 1d ago
pj9350l18sa-etched.step pj9350l18sa: factory component page (tier=lcsc) · Ray 1d ago
pj9350l18sa-hero.glb pj9350l18sa: hero GLB from the etched model (keeps the MPN mark) · Ray 1d ago
pj9350l18sa-hero.overlay.json Publish 0.1.0 · Ray 1d ago
pj9350l18sa.glb Publish 0.1.0 · Ray 1d ago
pj9350l18sa.kicad_mod Publish 0.1.0 · Ray 1d ago
pj9350l18sa.kicad_sym Publish 0.1.0 · Ray 1d ago
pj9350l18sa.lbr Publish 0.1.0 · Ray 1d ago
pj9350l18sa.step Publish 0.1.0 · Ray 1d ago
README.md Publish 0.1.0 · Ray 1d ago
verification.json Verified: Published by the parts factory: tier lcsc, 3 pins · Ray 1d ago

PJ9350L18SA

PJSEMI · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23

PJ9350L18SA from PJSEMI, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Ground reference pin for the regulator; the datasheet gives no electrical limit for this pin.
2 VOUT power_out Regulated output voltage pin; a minimum 1uF capacitor must be connected from VOUT to ground to ensure stability.
3 VIN power_in Power input pin, rated 2.5V to 6.5V supply, and must always be at a dropout voltage higher than VOUT for proper regulation.

Key specifications

Parameter Value
Manufacturer PJSEMI
Package SOT-23
Category Power Management (PMIC)
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Voltage VIN 2.5 6.5 V 8
Output Voltage Accuracy (VOUT >= 1.8V) ∆VOUT -2 2 % VOUT ≥1.8V, IOUT=1mA 8
Line Regulation ∆VLINE 0.01 0.15 %/V VIN=2.7~5.5V, IOUT=1mA 8
Load Regulation ∆VLOAD 40 70 mV VOUT≤1.8V, IOUT=1~200mA 8
EN Logic High Voltage VENH 1.2 V VIN=5.5V, IOUT=1mA 8
EN Logic Low Voltage VENlL 0.4 V VIN=5.5V, VOUT=0V 8
EN Input Current IEN 1 μA VEN= 0~5.5V 8
Standby Current IStandby 1 μA VEN=0 8
Quiescent Current IQ 50 μA VIN=5V, IOUT=0mA 8
Current Limit ILIMIT 360 mA VIN=VOUT+1V 8
Short Circuit/Start Carrying Current ISHORT 100 mA VEN=VIN, VOUT Short to GND with 1Ω 8
Power Supply Rejection Rate at 1kHz PSRR 75 dB VIN=5VDC+0.5VP-P, f=1KHz, IOUT=10mA 8
Power Supply Rejection Rate at 1MHz PSRR 45 dB VIN=5VDC+0.5VP-P, f=1MHz, IOUT=10mA 8
Output Noise Voltage eN 100 μVRMS 10Hz to 100KHz, COUT=1μF 8
Output Discharge Resistance RDIS 160 Ω VIN=5.0V, VEN= 0V 8
Supply Voltage 2.5 6.5 V 7
Maximum Output Current 300 mA 7
Operating Ambient Temperature (recommended) -40 85 °C 7
Power Dissipation SOT-23 400 mW SOT-23 package 7
Maximum Input Voltage -0.3 8 V 7
Output Current 400 mA 7
Junction Temperature -40 125 °C 7
Operating Ambient Temperature (absolute) -40 85 °C 7
Storage Temperature Range -55 150 °C 7
Lead Temperature 260 °C 10 S 7
ESD Voltage HBM 2 kV HBM 7
Thermal Resistance Junction-to-Ambient SOT-23 250 °C/W Junction-to-Ambient, SOT-23 7

CAD (KiCad official)

  • Symbol: PJ9350L18SA
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: pj9350l18sa-etched.step / pj9350l18sa-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pj9350l18sa.step / pj9350l18sa.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: PJSEMI datasheet (18 pp, sha256 07d6b42aa3d8f2df, retrieved 2026-11-05, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF