component
PJ9193M18SE
Public Made by Adomby adom
PJSEMI Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownPJ9193M18SE
PJSEMI · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5
PJ9193M18SE from PJSEMI, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Power input voltage with a 2V to 6.5V operating supply range (absolute maximum -0.3 to 7V), and a 1µF ceramic capacitor is recommended close to the device between VIN and GND. |
| 2 | GND | power_in | Ground pin, which must be connected with a wide and short copper trace to the input and output capacitor grounds. |
| 3 | EN | input | Active-high chip enable with a logic high threshold of 1.2V minimum and a logic low threshold of 0.4V maximum (VIN = 3V to 5.5V), which is high impedance, is CMOS logic, and must not be left floating. |
| 4 | NC | unconnected | No internal connection. |
| 5 | VOUT | power_out | Regulated output voltage, which requires a minimum 1µF ceramic output capacitor (X7R or X5R) placed as close as possible to the VOUT and GND pins. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | PJSEMI |
| Package | SOT-23-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage | VIN | -0.3 | 6.5 | V | 5 | ||
| Output Voltage Accuracy | ΔVOUT | -2 | 2 | % | IOUT=40mA | 5 | |
| EN Logic Low (Shutdown) | VIL | 0.4 | V | VIN=3V to 5.5V | 5 | ||
| EN Logic High (Start up) | VIH | 1.2 | V | VIN=3V to 5.5V | 5 | ||
| Input Voltage | -0.3 | 7 | V | 4 | |||
| Maximum Junction Temperature | 260 | ℃ | 4 | ||||
| Storage Temperature Range | -40 | 125 | ℃ | 4 | |||
| Output Voltage | -0.3 | V | Printed as -0.3~VIN+0.3 V (max = VIN+0.3 V, not numeric) | 4 | |||
| Power Dissipation | 400 | mW | SOT-23-5 (mapped from layout) | 4 | |||
| Supply Voltage | 2 | 6.5 | V | 4 | |||
| Operating Free Air Temperature Range | TA | -40 | 85 | ℃ | 4 | ||
| Operating Junction Temperature Range | Tj | -40 | 125 | ℃ | 4 | ||
| Thermal Resistance, Junction-to-Ambient | 250 | ℃/W | SOT-23-5 (mapped from layout) | 4 | |||
| Quiescent Current | IQ | 70 | µA | VIN>VOUT, EN=VIN, IOUT=0mA | 5 | ||
| Dropout Voltage | VDROP | 130 | mV | IOUT=100mA | 5 | ||
| Dropout Voltage | VDROP | 250 | mV | IOUT=200mA | 5 | ||
| Line Regulation | ΔVLINE | 0.05 | %/V | VIN=VOUT+1V to 7V, IOUT=40mA | 5 | ||
| Load Regulation | ΔVLOAD | 50 | mV | 1mA<IOUT<100mA | 5 | ||
| Output Voltage Temperature Coefficient | TCVOUT | 100 | ppm/℃ | IOUT=10mA | 5 | ||
| Short Circuit Current | ISHORT | 50 | mA | RL=1Ω | 5 | ||
| EN Leakage Current | IEN | 1 | µA | 5 | |||
| Output Noise Voltage | eNO | 50 | µVRMS | 300Hz to 50KHz, IOUT=40mA | 5 | ||
| Power Supply Rejection Rate | PSRR | 70 | dB | VIN=VOUT+1, IOUT=40mA, f=1KHz | 5 | ||
| Current Limit | ILIM | 450 | mA | VIN=VOUT+1 | 5 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | connections for input and output capacitors must be back to the PJ9193 Series ground pin using as wide and as short of a copper trace as is practical.Connections using long trace | 7 |
CAD (KiCad official)
- Symbol:
PJ9193M18SE - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
pj9193m18se-etched.step/pj9193m18se-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pj9193m18se.step/pj9193m18se.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: PJSEMI datasheet (11 pp, sha256
9a82ee51ef372c12, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).