component
PJ78L06SQ
Public Made by Adomby adom
PJSEMI Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-89. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Made with KiCad 10.0 · needs KiCad 10.0 or later to open · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 16d ago |
| viewers | 16d ago |
| package.json | 16d ago |
| page.json | 16d ago |
| pj78l06sq-etched.glb | 16d ago |
| pj78l06sq-etched.step | 16d ago |
| pj78l06sq-hero.glb | 16d ago |
| pj78l06sq-hero.overlay.json | 16d ago |
| pj78l06sq.glb | 16d ago |
| pj78l06sq.kicad_mod | 16d ago |
| pj78l06sq.kicad_sym | 16d ago |
| pj78l06sq.lbr | 16d ago |
| pj78l06sq.step | 16d ago |
| README.md | 16d ago |
PJ78L06SQ
PJSEMI · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-89
PJ78L06SQ from PJSEMI, in a SOT-89. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT | power_out | Regulated 6 V output that delivers up to 100 mA, with internal thermal overload protection and short-circuit limiting. |
| 2 | GND | power_in | Common ground reference pin; the datasheet gives no electrical limit specific to this pin. |
| 3 | IN | power_in | Unregulated input pin with a maximum input voltage of 30 V, used with a 0.33 µF input capacitor (C1) in the application circuit. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | PJSEMI |
| Package | SOT-89 |
| Category | Power Management (PMIC) |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output Voltage | VO | 5.76 | 6 | 6.24 | V | TJ=25℃ | 2 |
| Output Voltage | VO | 5.7 | 6 | 6.3 | V | IO=1mA to 40mA VI=8.5V to 21V | 2 |
| Line Regulation | △Vo | 155 | mV | VI=8.5V to 21V TJ=25℃ | 2 | ||
| Line Regulation | △Vo | 105 | mV | VI=9V to 21V TJ=25℃ | 2 | ||
| Load Regulation | △VO | 65 | mV | IO=1mA to 100 mA, TJ=25℃ | 2 | ||
| Load Regulation | △VO | 35 | mV | IO=1mA to 40 mA, TJ=25℃ | 2 | ||
| Ripple Rejection | RR | 40 | dB | VI=9V to 19V, TJ=25℃ f=120Hz | 2 | ||
| Output Noise Voltage | VN | 49 | μV | f=10Hz~100KHz TJ=25℃ | 2 | ||
| Dropout Voltage | VD | 1.7 | V | TJ=25℃ | 2 | ||
| Quiescent Current | IQ | 5.5 | mA | TJ=25℃ | 2 | ||
| Quiescent Current Change | △IQ | 1.5 | mA | VI=9V to 21V, IO=40mA | 2 | ||
| Quiescent Current Change | △IQ | 0.1 | mA | VI=11V, IO=1mA to 40mA | 2 | ||
| Input Voltage | VI | 30 | V | 1 | |||
| Output Current | IO | 100 | mA | 1 | |||
| Junction Temperature | TJ | 150 | ℃ | 1 | |||
| Power Dissipation | PD | 500 | mW | 1 | |||
| Storage Temperature Range | TSTG | -55 | 150 | ℃ | 1 | ||
| Operating Temperature Range | TOPR | -40 | 125 | ℃ | 1 |
CAD (KiCad official)
- Symbol:
PJ78L06SQ - Footprint:
Package_TO_SOT_SMD:SOT-89-3 - 3D model: SOT-89 (KiCad packages3D, STEP)
- 3D model files:
pj78l06sq-etched.step/pj78l06sq-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pj78l06sq.step/pj78l06sq.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: PJSEMI datasheet (4 pp, sha256
c230e9ef247a6720, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).