component

PJ78L05PA

Public Made by Adom

by adom

PJSEMI Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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PJ78L05PA

PJSEMI · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOP-8

PJ78L05PA from PJSEMI, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VOUT power_out Regulated 5 V output, rated up to 100 mA, and should be bypassed with a 0.1 µF capacitor located as close as possible to the regulator.
2 GND power_in Ground connection; the datasheet lists pins 2, 3, 6 and 7 as GND.
3 GND power_in Ground connection; the datasheet lists pins 2, 3, 6 and 7 as GND.
4 NC unconnected Not connected; the datasheet gives no function for this pin.
5 NC unconnected Not connected; the datasheet gives no function for this pin.
6 GND power_in Ground connection; the datasheet lists pins 2, 3, 6 and 7 as GND.
7 GND power_in Ground connection; the datasheet lists pins 2, 3, 6 and 7 as GND.
8 VIN power_in Unregulated input voltage, with an absolute maximum of 35 V, and should be bypassed with a 0.33 µF capacitor located as close as possible to the regulator.

Key specifications

Parameter Value
Manufacturer PJSEMI
Package SOP-8
Category Power Management (PMIC)
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Voltage VI 35 V 1
Output Current IO 100 mA 1
Junction Temperature TJ 150 °C 1
Operating Temperature Range TOPR -40 125 °C 1
Storage Temperature Range TSTG -55 150 °C 1
Output Voltage VO 4.8 5 5.2 V TJ=25°C 2
Output Voltage VO 4.75 5 5.25 V IO=1mA to 40mA, VI=7V to 20V 2
Line Regulation △VO 150 mV VI=7V to 20V, TJ=25°C 2
Line Regulation △VO 100 mV VI=8V to 20V, TJ=25°C 2
Load Regulation △VO 60 mV IO=1mA to 100mA ,TJ=25°C 2
Load Regulation △VO 30 mV IO=1mA to 40 mA, TJ=25°C 2
Ripple Rejection RR 40 49 dB VI=8V to 20V, f=120Hz, TJ=25°C 2
Quiescent Current IQ 3.8 6 mA 2
Quiescent Current Change △IQ 1.5 mA VI=8V to 20V 2
Quiescent Current Change △IQ 0.1 mA IO=1mA to 40mA 2

CAD (KiCad official)

  • Symbol: PJ78L05PA
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: pj78l05pa-etched.step / pj78l05pa-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pj78l05pa.step / pj78l05pa.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: PJSEMI datasheet (4 pp, sha256 c0921ce148f9da03, retrieved 2026-10-27, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus off (skipped (clean text read)), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF