component
PJ78D05TE
Public Made by Adomby adom
PJSEMI Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, TO-252. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 11d ago |
| viewers | 11d ago |
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| page.json | 11d ago |
| pj78d05te-etched.glb | 11d ago |
| pj78d05te-etched.step | 11d ago |
| pj78d05te-hero.glb | 11d ago |
| pj78d05te-hero.overlay.json | 11d ago |
| pj78d05te.glb | 11d ago |
| pj78d05te.kicad_mod | 11d ago |
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| pj78d05te.step | 11d ago |
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PJ78D05TE
PJSEMI · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · TO-252
PJ78D05TE from PJSEMI, in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Unregulated input voltage pin, rated up to 35V maximum, with a 0.33 µF input capacitor shown in the typical application circuit. |
| 2 | GND | power_in | Ground reference pin common to input and output, shared with the tab-side return in the typical application circuit. |
| 3 | VOUT | power_out | Regulated 5V output (PJ78D05TE, 4.8V to 5.2V at 25°C) delivering up to 1A, with a 0.1 µF output capacitor shown in the typical application circuit. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | PJSEMI |
| Package | TO-252 |
| Category | Power Management (PMIC) |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output Voltage | VO | 4.8 | 5 | 5.2 | V | TJ=25°C | 3 |
| Output Voltage | VO | 4.75 | 5 | 5.25 | V | IO=5mA to 1A, VI=8V to 20V, PD<15W | 3 |
| Line Regulation | △VO | 100 | mV | VI=7.5V to 25V,TJ=25°C | 3 | ||
| Line Regulation | △VO | 50 | mV | VI=8V to 12V,TJ=25°C | 3 | ||
| Load Regulation | △VO | 100 | mV | IO=5mA to 1A,TJ=25°C | 3 | ||
| Load Regulation | △VO | 50 | mV | IO=250mA to 750mA,TJ=25°C | 3 | ||
| Ripple Rejection | RR | 62 | 73 | dB | VI=8V to 18V, f=120Hz | 3 | |
| Quiescent Current | IQ | 8 | mA | TJ=25°C | 3 | ||
| Quiescent Current Change | △IQ | 0.8 | mA | VI=8V to 25V | 3 | ||
| Quiescent Current Change | △IQ | 0.5 | mA | IO=5mA to 1A | 3 | ||
| Dropout Voltage | VD | 2 | V | IO=1A,TJ=25°C | 3 | ||
| Temperature coefficient of VO | △VO/△T | 0.8 | mV/°C | IO=5mA | 3 | ||
| Output Noise Voltage | VN | 42 | μV | 10Hz≤f≤100kHz,TA=25°C | 3 | ||
| Input Voltage | VI | 35 | V | Ratings at 25℃ ambient | 2 | ||
| Output Current | IO | 1 | A | Ratings at 25℃ ambient | 2 | ||
| Maximum Power Dissipation | PD | 1.5 | W | Ratings at 25℃ ambient | 2 | ||
| Operating Temperature Range | TOPR | -40 | 125 | °C | Ratings at 25℃ ambient | 2 | |
| Storage Temperature Range | TSTG | -65 | 150 | °C | Ratings at 25℃ ambient | 2 |
CAD (KiCad official)
- Symbol:
PJ78D05TE - Footprint:
Package_TO_SOT_SMD:TO-252-2 - 3D model: TO-252 (KiCad packages3D, STEP)
- 3D model files:
pj78d05te-etched.step/pj78d05te-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pj78d05te.step/pj78d05te.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: PJSEMI datasheet (10 pp, sha256
5e63901e743e630b, retrieved 2026-10-26, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).