Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity

main

Generated by kicad-footprint-generator · KiCad file format 20260206

Name	Last commit message	Last updated
docs	Publish 0.1.0 · Ray	7d ago
viewers	pj75cl50sc: viewers · Ray	7d ago
package.json	Publish 0.1.0 · Ray	7d ago
page.json	Set visibility: public · Ray	7d ago
pj75cl50sc-etched.glb	Publish 0.1.0 · Ray	7d ago
pj75cl50sc-etched.step	pj75cl50sc: factory component page (tier=lcsc) · Ray	7d ago
pj75cl50sc-hero.glb	pj75cl50sc: hero GLB from the etched model (keeps the MPN mark) · Ray	7d ago
pj75cl50sc-hero.overlay.json	Publish 0.1.0 · Ray	7d ago
pj75cl50sc.glb	Publish 0.1.0 · Ray	7d ago
pj75cl50sc.kicad_mod	Publish 0.1.0 · Ray	7d ago
pj75cl50sc.kicad_sym	Publish 0.1.0 · Ray	7d ago
pj75cl50sc.lbr	Publish 0.1.0 · Ray	7d ago
pj75cl50sc.step	Publish 0.1.0 · Ray	7d ago
README.md	Publish 0.1.0 · Ray	7d ago

PJ75CL50SC

PJSEMI · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-3

PJ75CL50SC from PJSEMI, in a SOT-23-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	GND	power_in	Ground reference pin; input and output capacitors must be returned to a clean analog ground located no more than 1cm from the pins.
2	VOUT	power_out	Regulated output voltage (fixed options 3V to 12V, in 0.1V steps); a minimum of 1uF capacitor must be connected from VOUT to ground for stability.
3	VIN	power_in	Power input with a 3V to 40V supply range; VIN must always be higher than VOUT by the dropout voltage for the device to regulate properly.

Key specifications

Parameter	Value
Manufacturer	PJSEMI
Package	SOT-23-3
Category	Power Management (PMIC)
Pins	3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Input Voltage	VIN	3		40	V		6
Output Voltage	VOUT	3		12	V		6
Output Voltage Accuracy	∆VOUT	-2		2	%		6
Maximum Output Current	IOUT(Max)	150			mA		6
Quiescent Current	IQ		5	10	μA	IOUT=0mA	6
Dropout Voltage	VDROP		740	1000	mV	VOUT >3V, IOUT=100mA	6
Line Regulation	∆VLINE		0.01	0.1	%/V	IOUT=1mA	6
Load Regulation	∆VLOAD		2	4	%	1mA<IOUT<100mA	6
Current Limit	ILimit		200		mA		6
Short Current	IShort		200		mA	OUT Short to GND	6
Power Supply Rejection Ratio	PSRR		50		dB	VOUT=3.3V, IOUT=1mA, f=1KHz	6
Startup Time	tStart		500		μS		6
OTP			165		°C		6
OTP hysteresis			30		°C		6
Supply Voltage		3		40	V		5
Maximum Output Current				150	mA		5
Operating Ambient Temperature		-40		85	°C		5
Input Voltage				42	V		5
Output Voltage		-0.3		20	V		5
Power Dissipation				400	mW	SOT-23-3	5
Operating Junction Temperature				125	°C		5
Operating Ambient Temperature		-40		85	°C		5
Storage Temperature Range		-55		125	°C		5
Lead Temperature				260	°C	10S	5
ESD Voltage HBM				2	kV	HBM	5
Thermal Resistance, Junction-to-Ambient	RθJA			300	°C/W	SOT-23-3	5

CAD (KiCad official)

Symbol: PJ75CL50SC
Footprint: Package_TO_SOT_SMD:SOT-23-3
3D model: SOT-23-3 (KiCad packages3D, STEP)
3D model files: pj75cl50sc-etched.step / pj75cl50sc-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pj75cl50sc.step / pj75cl50sc.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: PJSEMI datasheet (18 pp, sha256 5a8117904b6cd02c, retrieved 2026-10-18, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF