component
PJ71K50SQ
Public Made by Adomby adom
PJSEMI Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-89-3. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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PJ71K50SQ
PJSEMI · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-89-3
PJ71K50SQ from PJSEMI, in a SOT-89-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground reference pin of the three-terminal regulator; the datasheet gives no electrical limit for this pin. |
| 2 | VIN | power_in | Regulator input pin; the datasheet rates the input voltage up to 24V and the absolute maximum supply voltage as -0.3V to 28V. |
| 3 | VOUT | power_out | Regulated output pin; for the PJ71K50SQ the output is 5.0V ±5% (4.75V to 5.25V) at IOUT=10mA, with output current of 30mA typical. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | PJSEMI |
| Package | SOT-89-3 |
| Category | Power Management (PMIC) |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output Voltage | VOUT | 4.75 | 5 | 5.25 | V | 7V IOUT=10mA | 3 |
| Output Current | IOUT | 20 | 30 | mA | 7V | 3 | |
| Load Regulation | 60 | 100 | mV | 7V 1mA≤IOUT≤30mA | 3 | ||
| Voltage Drop | VD | 100 | mV | IOUT=1mA | 3 | ||
| Current Consumption | ISS | 5 | 9 | uA | 7V No load | 3 | |
| Line Regulation | △VOUT/△VIN×VOUT | 0.2 | %/V | 6V≤VIN≤24V IOUT=1mA | 3 | ||
| Input Voltage | VIN | 24 | V | 3 | |||
| Temperature Coefficient of Output Voltage | △VOUT/△Ta | -0.75 | 0.75 | mV/℃ | 7V IOUT=10mA 0℃<Ta<70℃ | 3 | |
| Output Voltage Tolerance | -5 | 5 | % | 1 | |||
| Supply Voltage (absolute maximum) | VIN | -0.3 | 28 | V | 2 | ||
| Power Dissipation | PD | 200 | mW | 2 | |||
| Operating Ambient Temperature | TOPR | 0 | 70 | °C | 2 | ||
| Storage Temperature | TSTG | -65 | 125 | °C | 2 |
CAD (KiCad official)
- Symbol:
PJ71K50SQ - Footprint:
Package_TO_SOT_SMD:SOT-89-3 - 3D model: SOT-89-3 (KiCad packages3D, STEP)
- 3D model files:
pj71k50sq-etched.step/pj71k50sq-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pj71k50sq.step/pj71k50sq.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: PJSEMI datasheet (7 pp, sha256
1bd1fa97ea64bc85, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# PJ71K50SQ
**PJSEMI** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-89-3
PJ71K50SQ from PJSEMI, in a SOT-89-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground reference pin of the three-terminal regulator; the datasheet gives no electrical limit for this pin. |
| 2 | VIN | power_in | Regulator input pin; the datasheet rates the input voltage up to 24V and the absolute maximum supply voltage as -0.3V to 28V. |
| 3 | VOUT | power_out | Regulated output pin; for the PJ71K50SQ the output is 5.0V ±5% (4.75V to 5.25V) at IOUT=10mA, with output current of 30mA typical. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | PJSEMI |
| Package | SOT-89-3 |
| Category | Power Management (PMIC) |
| Pins | 3 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output Voltage | VOUT | 4.75 | 5 | 5.25 | V | 7V IOUT=10mA | 3 |
| Output Current | IOUT | 20 | 30 | | mA | 7V | 3 |
| Load Regulation | | | 60 | 100 | mV | 7V 1mA≤IOUT≤30mA | 3 |
| Voltage Drop | VD | | | 100 | mV | IOUT=1mA | 3 |
| Current Consumption | ISS | | 5 | 9 | uA | 7V No load | 3 |
| Line Regulation | △VOUT/△VIN×VOUT | | | 0.2 | %/V | 6V≤VIN≤24V IOUT=1mA | 3 |
| Input Voltage | VIN | | | 24 | V | | 3 |
| Temperature Coefficient of Output Voltage | △VOUT/△Ta | -0.75 | | 0.75 | mV/℃ | 7V IOUT=10mA 0℃<Ta<70℃ | 3 |
| Output Voltage Tolerance | | -5 | | 5 | % | | 1 |
| Supply Voltage (absolute maximum) | VIN | -0.3 | | 28 | V | | 2 |
| Power Dissipation | PD | | | 200 | mW | | 2 |
| Operating Ambient Temperature | TOPR | 0 | | 70 | °C | | 2 |
| Storage Temperature | TSTG | -65 | | 125 | °C | | 2 |
## CAD (KiCad official)
- Symbol: `PJ71K50SQ`
- Footprint: `Package_TO_SOT_SMD:SOT-89-3`
- 3D model: SOT-89-3 (KiCad packages3D, STEP)
- 3D model files: `pj71k50sq-etched.step` / `pj71k50sq-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `pj71k50sq.step` / `pj71k50sq.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [PJSEMI datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588911959593406464) (7 pp, sha256 `1bd1fa97ea64bc85`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/pj71k50sq-datasheet.pdf)