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Contents

README

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PJ71K33SC

PJSEMI · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23

PJ71K33SC from PJSEMI, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Ground / common return for the regulator. All bypass capacitor return currents should tie here.
2 VOUT power_out Regulated 3.3V (±5%) output. Nominal load 20-30 mA. Requires a 10 µF output bypass capacitor to GND per the recommended application circuit.
3 VIN power_in Unregulated supply input. Operating range approximately 4.5 V to 24 V (absolute max 28 V). Requires a 10 µF input bypass capacitor to GND per the recommended application circuit.

Key specifications

Parameter Value
Manufacturer PJSEMI
Package SOT-23
Category PMIC
Pins 3

Ordering variants

Same part, different packaging or reel option.

  • PJ71K33SC

CAD (KiCad official)

  • Symbol: PJ71K33SC
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: pj71k33sc-etched.step / pj71k33sc-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pj71k33sc.step / pj71k33sc.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: PJSEMI datasheet (7 pp, sha256 0b6db57566b43564, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF