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PJ56L50SC

Public Made by Adom

by adom

PJSEMI Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-3. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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PJ56L50SC

PJSEMI · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-3

PJ56L50SC from PJSEMI, in a SOT-23-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Ground reference pin; the 1µF input and 10µF output capacitors are specified to connect between their respective pins and GND, with a wide copper trace required for GND.
2 VOUT power_out Regulated 3.0 V, 3.3 V, 3.6 V or 5.0 V output (per part number) with a current limit of 220 mA typical and a maximum output current of 150 mA; a minimum 10µF ceramic output capacitor (X7R or X5R) must be placed close to VOUT and GND, and the VOUT-to-GND absolute maximum is -0.3 to +6 V.
3 VIN power_in Power input with a recommended supply range of 5 to 60 V and an absolute maximum VIN-to-GND rating of -0.3 to +80 V, decoupled by a 1µF ceramic capacitor placed as close to the pin as possible.

Key specifications

Parameter Value
Manufacturer PJSEMI
Package SOT-23-3
Category Power Management (PMIC)
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Voltage VIN 5 60 V 7
Output Voltage Accuracy ΔVOUT -2 2 % VIN=12V, IOUT=10mA 7
Dropout Voltage VDROP 150 mV VIN=VOUTNOM-0.1V, IOUT=10mA 7
Dropout Voltage VDROP 700 mV VIN=VOUTNOM-0.1V, IOUT=100mA 7
Supply Voltage 5 60 V 6
Maximum Output Current 150 mA 6
Operating Ambient Temperature -40 85 °C 6
VIN to GND Voltage -0.3 80 V 6
VOUT to GND Voltage -0.3 6 V 6
VOUT to VIN Voltage -35 0.3 V 6
Power Dissipation 400 mW SOT-23-3 package 6
Operating Ambient Temperature -40 85 °C 6
Junction Temperature 150 °C 6
Storage Temperature Range -40 150 °C 6
ESD Voltage (HBM) 4 kV HBM 6
ESD Voltage (MM) 100 V MM 6
Thermal Resistance, Junction-to-Ambient (SOT-23-3) 300 °C/W Junction-to-ambient, SOT-23-3 6

CAD (KiCad official)

  • Symbol: PJ56L50SC
  • Footprint: Package_TO_SOT_SMD:SOT-23-3
  • 3D model: SOT-23-3 (KiCad packages3D, STEP)
  • 3D model files: pj56l50sc-etched.step / pj56l50sc-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pj56l50sc.step / pj56l50sc.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: PJSEMI datasheet (21 pp, sha256 38751d6877f98995, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF