component

PJ54M33SE

Public Made by Adom

by adom

PJSEMI Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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PJ54M33SE

PJSEMI · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5

PJ54M33SE from PJSEMI, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VIN power_in Power input voltage, specified at 3 V to 45 V in the recommended operating conditions, with an absolute maximum VIN-to-GND rating of -0.3 V to +55 V.
2 GND power_in Ground reference for the regulator; the input and output capacitors must be placed as close as possible to the device with their return to GND.
3 EN input Chip enable, active high (VIH min 1 V, VIL max 0.4 V); the pin is high impedance and is neither pulled up nor down internally, so it must not float and should be tied to VIN when unused, with an absolute maximum of -0.3 V to +55 V to GND.
4 NC unconnected No connection; the pin is not connected internally.
5 VOUT power_out Regulated output voltage (1.8 V to 6 V fixed options; this part is 3.3 V), rated for up to 350 mA with an absolute maximum VOUT-to-GND rating of -0.3 V to +6 V and a minimum 10 µF ceramic output capacitor recommended.

Key specifications

Parameter Value
Manufacturer PJSEMI
Package SOT-23-5
Category Power Management (PMIC)
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Voltage VIN 3 45 V 8
Maximum Output Current (electrical) IOUT_Max 300 350 mA 8
Output Voltage Accuracy ΔVOUT -2 2 % VIN=12V, IOUT=10mA 8
EN Input Threshold Logic Low VIL 0.4 V 8
EN Input Threshold Logic High VIH 1 V 8
Supply Voltage VIN 3 45 V 7
Maximum Output Current IOUT 350 mA 7
Operating Ambient Temperature TA -40 85 °C 7
VIN to GND Voltage VIN-GND -0.3 55 V 7
VOUT to GND Voltage VOUT-GND -0.3 6 V 7
VOUT to VIN Voltage VOUT-VIN -55 0.3 V 7
EN to GND Voltage EN-GND -0.3 55 V 7
Power Dissipation SOT-23-5 PD 500 mW SOT-23-5 package 7
Thermal Resistance, Junction-to-Ambient SOT-23-5 θJA 250 °C/W SOT-23-5 package 7
Operating Ambient Temperature (absolute table) TA -40 85 °C 7
Junction Temperature TJ 150 °C 7
Storage Temperature Range TSTG -40 150 °C 7

CAD (KiCad official)

  • Symbol: PJ54M33SE
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: pj54m33se-etched.step / pj54m33se-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pj54m33se.step / pj54m33se.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: PJSEMI datasheet (25 pp, sha256 494f5a1224bd9a3b, retrieved 2026-10-17, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF