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PJ4054E20SE
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PJSEMI Battery Management ICs, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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PJ4054E20SE
PJSEMI · Battery Management ICs · SOT-23-5
PJ4054E20SE from PJSEMI, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CHRG | output | Open-drain charge status output that uses a strong pull-down while a charge cycle is active and goes high impedance once charging has terminated, with a weak pull-down current of 3 mA. |
| 2 | GND | power_in | Ground pin for the charger, which also serves as the main thermal path from the die to the PC board copper. |
| 3 | BAT | power_out | Charging current output that supplies the programmed charge current to the battery, with an absolute pin voltage range of -4.5 to 5.5 V. |
| 4 | VCC | power_in | Positive input supply pin, rated at 4.5 to 6.2 V for normal operation and -0.3 to 12 V absolute maximum. |
| 5 | PROG | bidirectional | Charge current program, charge current monitor and shutdown pin, with a 1.0 V regulated voltage and an absolute maximum of 8.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | PJSEMI |
| Package | SOT-23-5 |
| Category | Power Management ICs |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Supply Voltage | VCC | 4.5 | 6.2 | V | 5 | ||
| Regulated Output (Float) Voltage | VFLOAT | -0.6 | 0.6 | % | 5 | ||
| BAT Pin Current | IBAT | 700 | 800 | 900 | mA | RPROG = 1.25K | 5 |
| BAT Pin Current | IBAT | 90 | 100 | 110 | mA | RPROG = 10K | 5 |
| C/10 Termination Current | ITERM | 8.5 | 10 | 11.5 | % | 5 | |
| PROG Pin Voltage | VPROG | 0.93 | 1 | 1.07 | V | 5 | |
| Input Supply Voltage Absolute Maximum | VCC | -0.3 | 12 | V | VCC Input Voltage | 5 | |
| Prog Pin Voltage Absolute Maximum | VPROG | -0.3 | 8.5 | V | Prog Pin Voltage | 5 | |
| CHG,BAT Pin Voltage Absolute Maximum | VBAT | -4.5 | 5.5 | V | CHG,BAT Pin Voltage | 5 | |
| Power Dissipation | PD | 0.6 | W | 5 | |||
| Operating Junction Temperature Range | TOPR | -40 | 85 | °C | 5 | ||
| Storage Temperature | TSTG | -55 | 125 | °C | 5 | ||
| Junction-to-Ambient Thermal Resistance | RθJA | 170 | °C/W | 5 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | copper lead frame, through the package leads, (especially the ground lead) to the PC board copper. The PC board | 9 |
CAD (KiCad official)
- Symbol:
PJ4054E20SE - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
pj4054e20se-etched.step/pj4054e20se-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pj4054e20se.step/pj4054e20se.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: PJSEMI datasheet (10 pp, sha256
8699c177def7ac3a, retrieved 2026-10-27, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed (audit)), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# PJ4054E20SE
**PJSEMI** · Battery Management ICs · SOT-23-5
PJ4054E20SE from PJSEMI, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CHRG | output | Open-drain charge status output that uses a strong pull-down while a charge cycle is active and goes high impedance once charging has terminated, with a weak pull-down current of 3 mA. |
| 2 | GND | power_in | Ground pin for the charger, which also serves as the main thermal path from the die to the PC board copper. |
| 3 | BAT | power_out | Charging current output that supplies the programmed charge current to the battery, with an absolute pin voltage range of -4.5 to 5.5 V. |
| 4 | VCC | power_in | Positive input supply pin, rated at 4.5 to 6.2 V for normal operation and -0.3 to 12 V absolute maximum. |
| 5 | PROG | bidirectional | Charge current program, charge current monitor and shutdown pin, with a 1.0 V regulated voltage and an absolute maximum of 8.5 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | PJSEMI |
| Package | SOT-23-5 |
| Category | Power Management ICs |
| Pins | 5 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Supply Voltage | VCC | 4.5 | | 6.2 | V | | 5 |
| Regulated Output (Float) Voltage | VFLOAT | -0.6 | | 0.6 | % | | 5 |
| BAT Pin Current | IBAT | 700 | 800 | 900 | mA | RPROG = 1.25K | 5 |
| BAT Pin Current | IBAT | 90 | 100 | 110 | mA | RPROG = 10K | 5 |
| C/10 Termination Current | ITERM | 8.5 | 10 | 11.5 | % | | 5 |
| PROG Pin Voltage | VPROG | 0.93 | 1 | 1.07 | V | | 5 |
| Input Supply Voltage Absolute Maximum | VCC | -0.3 | | 12 | V | VCC Input Voltage | 5 |
| Prog Pin Voltage Absolute Maximum | VPROG | -0.3 | | 8.5 | V | Prog Pin Voltage | 5 |
| CHG,BAT Pin Voltage Absolute Maximum | VBAT | -4.5 | | 5.5 | V | CHG,BAT Pin Voltage | 5 |
| Power Dissipation | PD | | | 0.6 | W | | 5 |
| Operating Junction Temperature Range | TOPR | -40 | | 85 | °C | | 5 |
| Storage Temperature | TSTG | -55 | | 125 | °C | | 5 |
| Junction-to-Ambient Thermal Resistance | RθJA | | 170 | | °C/W | | 5 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | | copper lead frame, through the package leads, (especially the ground lead) to the PC board copper. The PC board | 9 |
## CAD (KiCad official)
- Symbol: `PJ4054E20SE`
- Footprint: `Package_TO_SOT_SMD:SOT-23-5`
- 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files: `pj4054e20se-etched.step` / `pj4054e20se-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `pj4054e20se.step` / `pj4054e20se.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [PJSEMI datasheet](docs/pj4054e20se-datasheet.pdf) (10 pp, sha256 `8699c177def7ac3a`, retrieved 2026-10-27, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed (audit)), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/pj4054e20se-datasheet.pdf)