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PIC32MX795F512L-80I

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Microchip Tech Microcontrollers (MCU/MPU/SOC), TQFP-100(12x12). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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PIC32MX795F512L-80I

Microchip Tech · Microcontrollers (MCU/MPU/SOC) · TQFP-100(12x12)

PIC32MX795F512L-80I from Microchip Tech, in a TQFP-100(12x12). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 AERXERR/RG15 bidirectional PORTG I/O pin RG15 (ST input) that also serves as the alternate Ethernet receive error input AERXERR.
2 VDD power_in Positive supply for peripheral logic and I/O pins, specified for 2.3V to 3.6V operation.
3 PMD5/RE5 bidirectional PORTE I/O pin RE5 (ST) that also carries Parallel Master Port data bit PMD5 (TTL/ST).
4 PMD6/RE6 bidirectional PORTE I/O pin RE6 (ST) that also carries Parallel Master Port data bit PMD6 (TTL/ST).
5 PMD7/RE7 bidirectional PORTE I/O pin RE7 (ST) that also carries Parallel Master Port data bit PMD7 (TTL/ST).
6 T2CK/RC1 bidirectional PORTC I/O pin RC1 (ST) that also serves as the Timer2 external clock input T2CK.
7 T3CK/AC2TX/RC2 bidirectional PORTC I/O pin RC2 (ST) that also serves as the Timer3 external clock input T3CK and alternate CAN2 transmit AC2TX.
8 T4CK/AC2RX/RC3 bidirectional PORTC I/O pin RC3 (ST) that also serves as the Timer4 external clock input T4CK and alternate CAN2 receive AC2RX (ST).
9 T5CK/SDI1/RC4 bidirectional PORTC I/O pin RC4 (ST) that also serves as the Timer5 external clock input T5CK and SPI1 data input SDI1 (ST).
10 ECOL/SCK2/U6TX/U3RTS/PMA5/CN8/RG6 bidirectional PORTG I/O pin RG6 (ST) with change notice CN8, shared with SPI2 clock SCK2, UART6 TX, UART3 RTS, PMP address PMA5 and Ethernet collision input ECOL.
11 ECRS/SDA4/SDI2/U3RX/PMA4/CN9/RG7 bidirectional PORTG I/O pin RG7 (ST) with change notice CN9, shared with I2C4 data SDA4, SPI2 data input SDI2, UART3 RX, PMP address PMA4 and Ethernet carrier sense ECRS.
12 ERXDV/AERXDV/ECRSDV/AECRSDV/SCL4/SDO2/U3TX/PMA3/CN10/RG8 bidirectional PORTG I/O pin RG8 (ST) with change notice CN10, shared with I2C4 clock SCL4, SPI2 data output SDO2, UART3 TX, PMP address PMA3 and Ethernet receive data valid/carrier sense data valid functions.
13 MCLR input Active-low Master Clear input that generates a device Reset when pulled low.
14 ERXCLK/AERXCLK/EREFCLK/AEREFCLK/SS2/U6RX/U3CTS/PMA2/CN11/RG9 bidirectional PORTG I/O pin RG9 (ST) with change notice CN11, shared with Ethernet receive/reference clock functions, SPI2 slave select SS2, UART6 RX, UART3 CTS and PMP address PMA2.
15 VSS power_in Ground reference for logic and I/O pins; must be connected at all times.
16 VDD power_in Positive supply for peripheral logic and I/O pins, specified for 2.3V to 3.6V operation.
17 TMS/RA0 bidirectional PORTA I/O pin RA0 (ST) that also serves as the JTAG test mode select input TMS.
18 AERXD0/INT1/RE8 bidirectional PORTE I/O pin RE8 (ST) that also serves as external interrupt 1 INT1 and alternate Ethernet receive data bit AERXD0 (ST).
19 AERXD1/INT2/RE9 bidirectional PORTE I/O pin RE9 (ST) that also serves as external interrupt 2 INT2 and alternate Ethernet receive data bit AERXD1 (ST).
20 AN5/C1IN+/VBUSON/CN7/RB5 bidirectional PORTB I/O pin RB5 (ST) that also serves as ADC analog input AN5, Comparator 1 positive input C1IN+, and USB VBUSON power control output.
21 AN4/C1IN-/CN6/RB4 bidirectional PORTB I/O pin RB4 (ST) that also serves as ADC analog input AN4 and Comparator 1 negative input C1IN-.
22 AN3/C2IN+/CN5/RB3 bidirectional PORTB I/O pin RB3 (ST) that also serves as ADC analog input AN3 and Comparator 2 positive input C2IN+.
23 AN2/C2IN-/CN4/RB2 bidirectional PORTB I/O pin RB2 (ST) that also serves as ADC analog input AN2 and Comparator 2 negative input C2IN-.
24 PGEC1/AN1/CN3/RB1 bidirectional PORTB I/O pin RB1 (ST) that also serves as ADC analog input AN1 and programming/debug clock input PGEC1 for channel 1.
25 PGED1/AN0/CN2/RB0 bidirectional PORTB I/O pin RB0 (ST) that also serves as ADC analog input AN0 and programming/debug data I/O PGED1 for channel 1.
26 PGEC2/AN6/OCFA/RB6 bidirectional PORTB I/O pin RB6 (ST) that also serves as ADC analog input AN6, Output Compare Fault A input OCFA, and programming/debug clock PGEC2.
27 PGED2/AN7/RB7 bidirectional PORTB I/O pin RB7 (ST) that also serves as ADC analog input AN7 and programming/debug data I/O PGED2.
28 VREF-/CVREF-/AERXD2/PMA7/RA9 power_in PORTA I/O pin RA9 (ST) that also serves as the analog voltage reference (low) input VREF- and comparator reference CVREF-.
29 VREF+/CVREF+/AERXD3/PMA6/RA10 power_in PORTA I/O pin RA10 (ST) that also serves as the analog voltage reference (high) input VREF+ and comparator reference CVREF+.
30 AVDD power_in Positive supply for analog modules; this pin must be connected at all times.
31 AVSS power_in Ground reference for analog modules; this pin must be connected at all times.
32 AN8/C1OUT/RB8 bidirectional PORTB I/O pin RB8 (ST) that also serves as ADC analog input AN8 and Comparator 1 output C1OUT.
33 AN9/C2OUT/RB9 bidirectional PORTB I/O pin RB9 (ST) that also serves as ADC analog input AN9 and Comparator 2 output C2OUT.
34 AN10/CVREFOUT/PMA13/RB10 bidirectional PORTB I/O pin RB10 (ST) that also serves as ADC analog input AN10, comparator voltage reference output CVREFOUT, and PMP address PMA13.
35 AN11/ERXERR/AETXERR/PMA12/RB11 bidirectional PORTB I/O pin RB11 (ST) that also serves as ADC analog input AN11, Ethernet receive error input ERXERR and PMP address PMA12.
36 VSS power_in Ground reference for logic and I/O pins; must be connected at all times.
37 VDD power_in Positive supply for peripheral logic and I/O pins, specified for 2.3V to 3.6V operation.
38 TCK/RA1 bidirectional PORTA I/O pin RA1 (ST) that also serves as the JTAG test clock input TCK.
39 SCK4/U5TX/U2RTS/RF13 bidirectional PORTF I/O pin RF13 (ST) that also serves as SPI4 clock SCK4, UART5 TX and UART2 RTS.
40 SS4/U5RX/U2CTS/RF12 bidirectional PORTF I/O pin RF12 (ST) that also serves as SPI4 slave select SS4, UART5 RX and UART2 CTS.
41 AN12/ERXD0/AECRS/PMA11/RB12 bidirectional PORTB I/O pin RB12 (ST) that also serves as ADC analog input AN12, Ethernet receive data ERXD0 and PMP address PMA11.
42 AN13/ERXD1/AECOL/PMA10/RB13 bidirectional PORTB I/O pin RB13 (ST) that also serves as ADC analog input AN13, Ethernet receive data ERXD1 and PMP address PMA10.
43 AN14/ERXD2/AETXD3/PMALH/PMA1/RB14 bidirectional PORTB I/O pin RB14 (ST) that also serves as ADC analog input AN14, Ethernet receive data ERXD2 and PMP address latch high PMALH.
44 AN15/ERXD3/AETXD2/OCFB/PMALL/PMA0/CN12/RB15 bidirectional PORTB I/O pin RB15 (ST) with change notice CN12 that also serves as ADC analog input AN15, Output Compare Fault B input OCFB and PMP address latch low PMALL.
45 VSS power_in Ground reference for logic and I/O pins; must be connected at all times.
46 VDD power_in Positive supply for peripheral logic and I/O pins, specified for 2.3V to 3.6V operation.
47 AETXD0/SS3/U4RX/U1CTS/CN20/RD14 bidirectional PORTD I/O pin RD14 (ST) with change notice CN20 that also serves as SPI3 slave select SS3, UART4 RX and UART1 CTS.
48 AETXD1/SCK3/U4TX/U1RTS/CN21/RD15 bidirectional PORTD I/O pin RD15 (ST) with change notice CN21 that also serves as SPI3 clock SCK3, UART4 TX and UART1 RTS.
49 SDA5/SDI4/U2RX/PMA9/CN17/RF4 bidirectional PORTF I/O pin RF4 (ST) with change notice CN17 that also serves as I2C5 data SDA5, SPI4 data input SDI4, UART2 RX and PMP address PMA9.
50 SCL5/SDO4/U2TX/PMA8/CN18/RF5 bidirectional PORTF I/O pin RF5 (ST) with change notice CN18 that also serves as I2C5 clock SCL5, SPI4 data output SDO4, UART2 TX and PMP address PMA8.
51 USBID/RF3 bidirectional PORTF I/O pin RF3 (ST) that also serves as the USB OTG ID detect input USBID.
52 SDA3/SDI3/U1RX/RF2 bidirectional PORTF I/O pin RF2 (ST) that also serves as I2C3 data SDA3, SPI3 data input SDI3 and UART1 RX.
53 SCL3/SDO3/U1TX/RF8 bidirectional PORTF I/O pin RF8 (ST) that also serves as I2C3 clock SCL3, SPI3 data output SDO3 and UART1 TX.
54 VBUS power_in USB bus power monitor input (analog).
55 VUSB3V3 power_in USB internal transceiver supply; if the USB module is not used, this pin must be connected to VDD.
56 D-/RG3 bidirectional USB D- data line (analog) shared with PORTG I/O pin RG3 (ST input).
57 D+/RG2 bidirectional USB D+ data line (analog) shared with PORTG I/O pin RG2 (ST input).
58 SCL2/RA2 bidirectional PORTA I/O pin RA2 (ST) that also serves as I2C2 synchronous serial clock SCL2.
59 SDA2/RA3 bidirectional PORTA I/O pin RA3 (ST) that also serves as I2C2 synchronous serial data SDA2.
60 TDI/RA4 bidirectional PORTA I/O pin RA4 (ST) that also serves as the JTAG test data input TDI.
61 TDO/RA5 bidirectional PORTA I/O pin RA5 that also serves as the JTAG test data output TDO.
62 VDD power_in Positive supply for peripheral logic and I/O pins, specified for 2.3V to 3.6V operation.
63 OSC1/CLKI/RC12 bidirectional Oscillator crystal input OSC1 (ST in RC mode, CMOS otherwise) and external clock input CLKI, shared with PORTC I/O pin RC12 (ST).
64 OSC2/CLKO/RC15 bidirectional Oscillator crystal output OSC2 that connects to a crystal or resonator and optionally functions as CLKO, shared with PORTC I/O pin RC15 (ST).
65 VSS power_in Ground reference for logic and I/O pins; must be connected at all times.
66 AETXCLK/SCL1/INT3/RA14 bidirectional PORTA I/O pin RA14 (ST) that also serves as external interrupt 3 INT3, I2C1 clock SCL1 and alternate Ethernet transmit clock AETXCLK (ST).
67 AETXEN/SDA1/INT4/RA15 bidirectional PORTA I/O pin RA15 (ST) that also serves as external interrupt 4 INT4, I2C1 data SDA1 and alternate Ethernet transmit enable AETXEN.
68 RTCC/EMDIO/AEMDIO/IC1/RD8 bidirectional PORTD I/O pin RD8 (ST) that also serves as RTCC alarm output RTCC, Input Capture 1 IC1, and Ethernet management data EMDIO.
69 SS1/IC2/RD9 bidirectional PORTD I/O pin RD9 (ST) that also serves as SPI1 slave select SS1 and Input Capture 2 IC2.
70 SCK1/IC3/PMCS2/PMA15/RD10 bidirectional PORTD I/O pin RD10 (ST) that also serves as SPI1 clock SCK1, Input Capture 3 IC3, PMP chip select 2 PMCS2 and PMP address PMA15.
71 EMDC/AEMDC/IC4/PMCS1/PMA14/RD11 bidirectional PORTD I/O pin RD11 (ST) that also serves as Input Capture 4 IC4, PMP chip select 1 PMCS1, PMP address PMA14 and Ethernet management clock EMDC.
72 SDO1/OC1/INT0/RD0 bidirectional PORTD I/O pin RD0 that also serves as SPI1 data output SDO1, Output Compare 1 output OC1 and external interrupt 0 INT0 (ST).
73 SOSCI/CN1/RC13 bidirectional 32.768 kHz secondary oscillator crystal input SOSCI (ST/CMOS) shared with PORTC I/O pin RC13 (ST) and change notice CN1.
74 SOSCO/T1CK/CN0/RC14 bidirectional 32.768 kHz secondary oscillator crystal output SOSCO shared with PORTC I/O pin RC14 (ST), Timer1 external clock T1CK and change notice CN0.
75 VSS power_in Ground reference for logic and I/O pins; must be connected at all times.
76 OC2/RD1 bidirectional PORTD I/O pin RD1 (ST) that also serves as Output Compare 2 output OC2.
77 OC3/RD2 bidirectional PORTD I/O pin RD2 (ST) that also serves as Output Compare 3 output OC3.
78 OC4/RD3 bidirectional PORTD I/O pin RD3 (ST) that also serves as Output Compare 4 output OC4.
79 ETXD2/IC5/PMD12/RD12 bidirectional PORTD I/O pin RD12 (ST) that also serves as Input Capture 5 IC5, PMP data bit PMD12 and Ethernet transmit data ETXD2.
80 ETXD3/PMD13/CN19/RD13 bidirectional PORTD I/O pin RD13 (ST) with change notice CN19 that also serves as PMP data bit PMD13 and Ethernet transmit data ETXD3.
81 OC5/PMWR/CN13/RD4 bidirectional PORTD I/O pin RD4 (ST) with change notice CN13 that also serves as Output Compare 5 output OC5 and PMP write strobe PMWR.
82 PMRD/CN14/RD5 bidirectional PORTD I/O pin RD5 (ST) with change notice CN14 that also serves as the Parallel Master Port read strobe PMRD.
83 ETXEN/PMD14/CN15/RD6 bidirectional PORTD I/O pin RD6 (ST) with change notice CN15 that also serves as PMP data bit PMD14 and Ethernet transmit enable ETXEN.
84 ETXCLK/PMD15/CN16/RD7 bidirectional PORTD I/O pin RD7 (ST) with change notice CN16 that also serves as PMP data bit PMD15 and Ethernet transmit clock ETXCLK (ST).
85 VCAP/VDDCORE power_in Capacitor for the internal voltage regulator; VCAP must not be connected to VDD and requires a low-ESR (about 1 ohm) capacitor rated at least 6V connected to ground.
86 VDD power_in Positive supply for peripheral logic and I/O pins, specified for 2.3V to 3.6V operation.
87 C1RX/ETXD1/PMD11/RF0 bidirectional PORTF I/O pin RF0 (ST) that also serves as CAN1 receive C1RX (ST), PMP data bit PMD11 and Ethernet transmit data ETXD1.
88 C1TX/ETXD0/PMD10/RF1 bidirectional PORTF I/O pin RF1 (ST) that also serves as CAN1 transmit C1TX, PMP data bit PMD10 and Ethernet transmit data ETXD0.
89 C2TX/ETXERR/PMD9/RG1 bidirectional PORTG I/O pin RG1 (ST) that also serves as CAN2 transmit C2TX, PMP data bit PMD9 and Ethernet transmit error ETXERR.
90 C2RX/PMD8/RG0 bidirectional PORTG I/O pin RG0 (ST) that also serves as CAN2 receive C2RX (ST) and PMP data bit PMD8.
91 TRCLK/RA6 bidirectional PORTA I/O pin RA6 (ST) that also serves as the trace clock output TRCLK.
92 TRD3/RA7 bidirectional PORTA I/O pin RA7 (ST) that also serves as trace data bit 3 output TRD3.
93 PMD0/RE0 bidirectional PORTE I/O pin RE0 (ST) that also carries Parallel Master Port data/address bit PMD0 (TTL/ST).
94 PMD1/RE1 bidirectional PORTE I/O pin RE1 (ST) that also carries Parallel Master Port data/address bit PMD1 (TTL/ST).
95 TRD2/RG14 bidirectional PORTG I/O pin RG14 (ST) that also serves as trace data bit 2 output TRD2.
96 TRD1/RG12 bidirectional PORTG I/O pin RG12 (ST) that also serves as trace data bit 1 output TRD1.
97 TRD0/RG13 bidirectional PORTG I/O pin RG13 (ST) that also serves as trace data bit 0 output TRD0.
98 PMD2/RE2 bidirectional PORTE I/O pin RE2 (ST) that also carries Parallel Master Port data/address bit PMD2 (TTL/ST).
99 PMD3/RE3 bidirectional PORTE I/O pin RE3 (ST) that also carries Parallel Master Port data/address bit PMD3 (TTL/ST).
100 PMD4/RE4 bidirectional PORTE I/O pin RE4 (ST) that also carries Parallel Master Port data/address bit PMD4 (TTL/ST).

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package TQFP-100(12x12)
Category Embedded Processors & Controllers
Pins 100

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage range (DC5, 80 MHz grade) VDD 2.3 3.6 V Temp. Range -40°C to +85°C 356
Max. Frequency 80 MHz VDD 2.3-3.6V, -40°C to +85°C 356
Operating Junction Temperature Range TJ -40 125 °C Industrial Temperature Devices 356
Operating Ambient Temperature Range TA -40 85 °C Industrial Temperature Devices 356
Package Thermal Resistance, 100-Pin TQFP (12x12x1 mm) JA 43 °C/W Junction to ambient; Note 1: achieved by package simulations 356

CAD (KiCad official)

  • Symbol: PIC32MX795F512L-80I
  • Footprint: Package_QFP:TQFP-100_12x12mm_P0.4mm
  • 3D model: TQFP-100(12x12) (KiCad packages3D, STEP)
  • 3D model files: pic32mx795f512l-80i-etched.step / pic32mx795f512l-80i-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pic32mx795f512l-80i.step / pic32mx795f512l-80i.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (446 pp, sha256 7c0e89419ff7a456, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF