component
PIC32MX564F128H-I
Public Made by Adomby adom
Microchip Tech MICROCHIP, TQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"slug": "pic32mx564f128h-i",
"version": "0.1.0",
"type": "component",
"description": "Microchip Tech MICROCHIP, TQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"embedded processors & controllers",
"pic32mx564f128h-i",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"pic32mx564f128h-i.kicad_sym",
"pic32mx564f128h-i.kicad_mod",
"pic32mx564f128h-i.glb",
"pic32mx564f128h-i.step",
"pic32mx564f128h-i.lbr",
"docs/hero.png",
"docs/pic32mx564f128h-i-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"pic32mx564f128h-i-hero.glb",
"pic32mx564f128h-i-hero.overlay.json",
"pic32mx564f128h-i-etched.glb"
],
"component": {
"mpn": "PIC32MX564F128H-I",
"manufacturer": "Microchip Tech",
"package": "TQFP-64(10x10)",
"pin_count": 64,
"category": "Embedded Processors & Controllers",
"subcategory": "MICROCHIP",
"datasheet": "https://ww1.microchip.com/downloads/en/DeviceDoc/PIC32MX5XX6XX7XX_Family)Datasheet_DS60001156K.pdf",
"parts": {
"symbol": "pic32mx564f128h-i.kicad_sym",
"footprint": "pic32mx564f128h-i.kicad_mod",
"model_3d": "pic32mx564f128h-i-hero.glb",
"model_3d_plain": "pic32mx564f128h-i-etched.glb",
"model_3d_step": "pic32mx564f128h-i-etched.step",
"model_3d_step_plain": "pic32mx564f128h-i.step",
"lbr": "pic32mx564f128h-i.lbr"
},
"distributor_links": {
"lcsc": "C634897"
},
"distributor_check": {
"checked_at": "2026-10-23T21:15:11Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": null,
"status": "deferred",
"error": "shared DigiKey quota guard: 800 calls left today"
},
"mouser": {
"pn": null,
"status": "quota"
}
},
"pins": [
{
"number": "1",
"name": "PMD5/RE5",
"type": "bidirectional",
"description": "PORTE I/O (RE5) with Parallel Master Port data bit 5 (TTL/ST buffer)."
},
{
"number": "2",
"name": "PMD6/RE6",
"type": "bidirectional",
"description": "PORTE I/O (RE6) with Parallel Master Port data bit 6 (TTL/ST buffer)."
},
{
"number": "3",
"name": "PMD7/RE7",
"type": "bidirectional",
"description": "PORTE I/O (RE7) with Parallel Master Port data bit 7 (TTL/ST buffer)."
},
{
"number": "4",
"name": "SCK2/U6TX/U3RTS/PMA5/CN8/RG6",
"type": "bidirectional",
"description": "PORTG I/O (RG6) shared with SPI2 clock, UART6 transmit, UART3 ready-to-send, PMP address 5 and change notification CN8."
},
{
"number": "5",
"name": "SDA4/SDI2/U3RX/PMA4/CN9/RG7",
"type": "bidirectional",
"description": "PORTG I/O (RG7) shared with I2C4 data, SPI2 data in, UART3 receive, PMP address 4 and change notification CN9."
},
{
"number": "6",
"name": "SCL4/SDO2/U3TX/PMA3/CN10/RG8",
"type": "bidirectional",
"description": "PORTG I/O (RG8) shared with I2C4 clock, SPI2 data out, UART3 transmit, PMP address 3 and change notification CN10."
},
{
"number": "7",
"name": "MCLR",
"type": "input",
"description": "Master Clear input, an active-low device Reset (Schmitt Trigger input) that is also used for programming and debugging."
},
{
"number": "8",
"name": "SS2/U6RX/U3CTS/PMA2/CN11/RG9",
"type": "bidirectional",
"description": "PORTG I/O (RG9) shared with SPI2 slave select, UART6 receive, UART3 clear-to-send, PMP address 2 and change notification CN11."
},
{
"number": "9",
"name": "VSS",
"type": "power_in",
"description": "Ground reference for logic and I/O pins; must be connected at all times."
},
{
"number": "10",
"name": "VDD",
"type": "power_in",
"description": "Positive supply for peripheral logic and I/O pins (2.3V to 3.6V operating range)."
},
{
"number": "11",
"name": "AN5/C1IN+/VBUSON/CN7/RB5",
"type": "bidirectional",
"description": "PORTB I/O (RB5) with analog input 5, Comparator 1 positive input, USB host/OTG bus power control output VBUSON and CN7."
},
{
"number": "12",
"name": "AN4/C1IN-/CN6/RB4",
"type": "bidirectional",
"description": "PORTB I/O (RB4) with analog input 4, Comparator 1 negative input and CN6."
},
{
"number": "13",
"name": "AN3/C2IN+/CN5/RB3",
"type": "bidirectional",
"description": "PORTB I/O (RB3) with analog input 3, Comparator 2 positive input and CN5."
},
{
"number": "14",
"name": "AN2/C2IN-/CN4/RB2",
"type": "bidirectional",
"description": "PORTB I/O (RB2) with analog input 2, Comparator 2 negative input and CN4."
},
{
"number": "15",
"name": "PGEC1/AN1/VREF-/CVREF-/CN3/RB1",
"type": "bidirectional",
"description": "PORTB I/O (RB1) with ICSP programming/debug clock channel 1, analog input 1, VREF- / CVREF- low reference input and CN3."
},
{
"number": "16",
"name": "PGED1/AN0/VREF+/CVREF+/PMA6/CN2/RB0",
"type": "bidirectional",
"description": "PORTB I/O (RB0) with ICSP programming/debug data channel 1, analog input 0, VREF+ / CVREF+ high reference input, PMP address 6 and CN2."
},
{
"number": "17",
"name": "PGEC2/AN6/OCFA/RB6",
"type": "bidirectional",
"description": "PORTB I/O (RB6) with ICSP programming/debug clock channel 2, analog input 6 and Output Compare Fault A input."
},
{
"number": "18",
"name": "PGED2/AN7/RB7",
"type": "bidirectional",
"description": "PORTB I/O (RB7) with ICSP programming/debug data channel 2 and analog input 7."
},
{
"number": "19",
"name": "AVDD",
"type": "power_in",
"description": "Positive supply for analog modules; must be connected at all times, even if the ADC is not used."
},
{
"number": "20",
"name": "AVSS",
"type": "power_in",
"description": "Ground reference for analog modules; must be connected at all times."
},
{
"number": "21",
"name": "AN8/SS4/U5RX/U2CTS/C1OUT/RB8",
"type": "bidirectional",
"description": "PORTB I/O (RB8) with analog input 8, SPI4 slave select, UART5 receive, UART2 clear-to-send and Comparator 1 output."
},
{
"number": "22",
"name": "AN9/C2OUT/PMA7/RB9",
"type": "bidirectional",
"description": "PORTB I/O (RB9) with analog input 9, Comparator 2 output and PMP address 7."
},
{
"number": "23",
"name": "TMS/AN10/CVREFOUT/PMA13/RB10",
"type": "bidirectional",
"description": "PORTB I/O (RB10) with JTAG test mode select, analog input 10, comparator voltage reference output and PMP address 13."
},
{
"number": "24",
"name": "TDO/AN11/PMA12/RB11",
"type": "bidirectional",
"description": "PORTB I/O (RB11) with JTAG test data output, analog input 11 and PMP address 12."
},
{
"number": "25",
"name": "VSS",
"type": "power_in",
"description": "Ground reference for logic and I/O pins; must be connected at all times."
},
{
"number": "26",
"name": "VDD",
"type": "power_in",
"description": "Positive supply for peripheral logic and I/O pins (2.3V to 3.6V operating range)."
},
{
"number": "27",
"name": "TCK/AN12/PMA11/RB12",
"type": "bidirectional",
"description": "PORTB I/O (RB12) with JTAG test clock input, analog input 12 and PMP address 11."
},
{
"number": "28",
"name": "TDI/AN13/PMA10/RB13",
"type": "bidirectional",
"description": "PORTB I/O (RB13) with JTAG test data input, analog input 13 and PMP address 10."
},
{
"number": "29",
"name": "AN14/SCK4/U5TX/U2RTS/PMALH/PMA1/RB14",
"type": "bidirectional",
"description": "PORTB I/O (RB14) with analog input 14, SPI4 clock, UART5 transmit, UART2 ready-to-send, PMP address latch high and PMP address 1."
},
{
"number": "30",
"name": "AN15/OCFB/PMALL/PMA0/CN12/RB15",
"type": "bidirectional",
"description": "PORTB I/O (RB15) with analog input 15, Output Compare Fault B input, PMP address latch low, PMP address 0 and CN12."
},
{
"number": "31",
"name": "AC1TX/SDA5/SDI4/U2RX/PMA9/CN17/RF4",
"type": "bidirectional",
"description": "PORTF I/O (RF4) with alternate CAN1 transmit, I2C5 data, SPI4 data in, UART2 receive, PMP address 9 and CN17."
},
{
"number": "32",
"name": "AC1RX/SCL5/SDO4/U2TX/PMA8/CN18/RF5",
"type": "bidirectional",
"description": "PORTF I/O (RF5) with alternate CAN1 receive, I2C5 clock, SPI4 data out, UART2 transmit, PMP address 8 and CN18."
},
{
"number": "33",
"name": "USBID/RF3",
"type": "bidirectional",
"description": "PORTF I/O (RF3) with USB OTG ID detect input."
},
{
"number": "34",
"name": "VBUS",
"type": "power_in",
"description": "USB bus power monitor analog input."
},
{
"number": "35",
"name": "VUSB3V3",
"type": "power_in",
"description": "USB internal transceiver supply; must be connected to VDD if the USB module is not used."
},
{
"number": "36",
"name": "D-/RG3",
"type": "bidirectional",
"description": "USB D- analog data line (RG3 input)."
},
{
"number": "37",
"name": "D+/RG2",
"type": "bidirectional",
"description": "USB D+ analog data line (RG2 input)."
},
{
"number": "38",
"name": "VDD",
"type": "power_in",
"description": "Positive supply for peripheral logic and I/O pins (2.3V to 3.6V operating range)."
},
{
"number": "39",
"name": "OSC1/CLKI/RC12",
"type": "bidirectional",
"description": "Primary oscillator crystal input or external clock source input (ST buffer in RC mode, CMOS otherwise), also PORTC I/O RC12."
},
{
"number": "40",
"name": "OSC2/CLKO/RC15",
"type": "bidirectional",
"description": "Primary oscillator crystal output, optionally CLKO in RC and EC modes, also PORTC I/O RC15."
},
{
"number": "41",
"name": "VSS",
"type": "power_in",
"description": "Ground reference for logic and I/O pins; must be connected at all times."
},
{
"number": "42",
"name": "RTCC/IC1/INT1/RD8",
"type": "bidirectional",
"description": "PORTD I/O (RD8) with RTCC alarm output, Input Capture 1 and External Interrupt 1."
},
{
"number": "43",
"name": "SS3/U4RX/U1CTS/SDA1/IC2/INT2/RD9",
"type": "bidirectional",
"description": "PORTD I/O (RD9) with SPI3 slave select, UART4 receive, UART1 clear-to-send, I2C1 data, Input Capture 2 and External Interrupt 2."
},
{
"number": "44",
"name": "SCL1/IC3/PMCS2/PMA15/INT3/RD10",
"type": "bidirectional",
"description": "PORTD I/O (RD10) with I2C1 clock, Input Capture 3, PMP chip select 2 / address 15 and External Interrupt 3."
},
{
"number": "45",
"name": "IC4/PMCS1/PMA14/INT4/RD11",
"type": "bidirectional",
"description": "PORTD I/O (RD11) with Input Capture 4, PMP chip select 1 / address 14 and External Interrupt 4."
},
{
"number": "46",
"name": "OC1/INT0/RD0",
"type": "bidirectional",
"description": "PORTD I/O (RD0) with Output Compare 1 output and External Interrupt 0."
},
{
"number": "47",
"name": "SOSCI/CN1/RC13",
"type": "bidirectional",
"description": "32.768 kHz secondary oscillator crystal input (ST, CMOS otherwise) with CN1 and PORTC I/O RC13."
},
{
"number": "48",
"name": "SOSCO/T1CK/CN0/RC14",
"type": "bidirectional",
"description": "32.768 kHz secondary oscillator crystal output with Timer1 external clock input, CN0 and PORTC I/O RC14."
},
{
"number": "49",
"name": "SCK3/U4TX/U1RTS/OC2/RD1",
"type": "bidirectional",
"description": "PORTD I/O (RD1) with SPI3 clock, UART4 transmit, UART1 ready-to-send and Output Compare 2."
},
{
"number": "50",
"name": "SDA3/SDI3/U1RX/OC3/RD2",
"type": "bidirectional",
"description": "PORTD I/O (RD2) with I2C3 data, SPI3 data in, UART1 receive and Output Compare 3."
},
{
"number": "51",
"name": "SCL3/SDO3/U1TX/OC4/RD3",
"type": "bidirectional",
"description": "PORTD I/O (RD3) with I2C3 clock, SPI3 data out, UART1 transmit and Output Compare 4."
},
{
"number": "52",
"name": "OC5/IC5/PMWR/CN13/RD4",
"type": "bidirectional",
"description": "PORTD I/O (RD4) with Output Compare 5, Input Capture 5, PMP write strobe and CN13."
},
{
"number": "53",
"name": "PMRD/CN14/RD5",
"type": "bidirectional",
"description": "PORTD I/O (RD5) with PMP read strobe and CN14."
},
{
"number": "54",
"name": "CN15/RD6",
"type": "bidirectional",
"description": "PORTD I/O (RD6) with change notification input CN15."
},
{
"number": "55",
"name": "CN16/RD7",
"type": "bidirectional",
"description": "PORTD I/O (RD7) with change notification input CN16."
},
{
"number": "56",
"name": "VCAP",
"type": "passive",
"description": "Capacitor connection for the internal voltage regulator; needs a low-ESR capacitor to ground and must not be connected to VDD."
},
{
"number": "57",
"name": "VDD",
"type": "power_in",
"description": "Positive supply for peripheral logic and I/O pins (2.3V to 3.6V operating range)."
},
{
"number": "58",
"name": "C1RX/RF0",
"type": "bidirectional",
"description": "PORTF I/O (RF0) with CAN1 bus receive input."
},
{
"number": "59",
"name": "C1TX/RF1",
"type": "bidirectional",
"description": "PORTF I/O (RF1) with CAN1 bus transmit output."
},
{
"number": "60",
"name": "PMD0/RE0",
"type": "bidirectional",
"description": "PORTE I/O (RE0) with Parallel Master Port data bit 0 (TTL/ST buffer)."
},
{
"number": "61",
"name": "PMD1/RE1",
"type": "bidirectional",
"description": "PORTE I/O (RE1) with Parallel Master Port data bit 1 (TTL/ST buffer)."
},
{
"number": "62",
"name": "PMD2/RE2",
"type": "bidirectional",
"description": "PORTE I/O (RE2) with Parallel Master Port data bit 2 (TTL/ST buffer)."
},
{
"number": "63",
"name": "PMD3/RE3",
"type": "bidirectional",
"description": "PORTE I/O (RE3) with Parallel Master Port data bit 3 (TTL/ST buffer)."
},
{
"number": "64",
"name": "PMD4/RE4",
"type": "bidirectional",
"description": "PORTE I/O (RE4) with Parallel Master Port data bit 4 (TTL/ST buffer)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-sonnet-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: Table 1-1 (pages 26-35) lists some 64-pin numbers that conflict with the Table 4 pin list (e.g. U1CT; VCAP is typed passive (external capacitor to ground for the regulator). Pin types for multiplexed I/; The datasheet covers the whole family and shares the pin table with the 64-pin QFN. The TQFP-64 (PT)",
"1/64 pins cited to the wrong page (name found elsewhere): ['9:VSS@p5']"
],
"pages_sent": 74,
"cost_usd": 0.7861,
"at": "2026-10-23T21:14:18"
},
"datasheet": {
"url": "https://ww1.microchip.com/downloads/en/DeviceDoc/PIC32MX5XX6XX7XX_Family)Datasheet_DS60001156K.pdf",
"pages": 446,
"sha256": "2413ac5834b12306",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 64,
"described": 64,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "pic32mx564f128h-i.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
12.0,
12.0,
1.1
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "60567e81b0770b6c519104183a7a05ba52dddc11146b5fbe21434fbb5801696c",
"checked": "2026-10-23",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "pic32mx564f128h-i-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
12.0,
12.0,
1.1
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "9f3d646bb4978d122a795e98d83e3a7ab48499083262ffd06dbe090526010a6b",
"checked": "2026-10-23",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
}
}