component
PIC24FV32KA304T-I
Public Made by Adomby adom
Microchip Tech Microcontrollers (MCU/MPU/SOC), TQFP-44(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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PIC24FV32KA304T-I
Microchip Tech · Microcontrollers (MCU/MPU/SOC) · TQFP-44(10x10)
PIC24FV32KA304T-I from Microchip Tech, in a TQFP-44(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SDA1/T1CK/U1RTS/CTED4/CN21/RB9 | bidirectional | I2C1 data input/output (SDA1) multiplexed with Timer1 clock input, UART1 RTS and CTMU edge input; ST input buffer with 18 mA/18 mA high-current sink/source capability. |
| 2 | U1RX/CN18/RC6 | bidirectional | UART1 receive input multiplexed on RC6 with Change Notification input CN18; ST input buffer. |
| 3 | U1TX/CN17/RC7 | bidirectional | UART1 transmit output multiplexed on RC7 with Change Notification input CN17. |
| 4 | OC2/CN20/RC8 | bidirectional | Output Compare/PWM2 output multiplexed on RC8 with Change Notification input CN20. |
| 5 | IC2/CTED7/CN19/RC9 | bidirectional | Input Capture 2 input multiplexed on RC9 with CTMU trigger edge input CTED7; ST input buffer. |
| 6 | IC1/CTED3/CN9/RA7 | bidirectional | Input Capture 1 input multiplexed on RA7 with CTMU trigger edge input CTED3; ST input buffer. |
| 7 | VCAP | power_out | Voltage regulator output on FV devices; requires a 10 µF capacitor connected to ground and must not be connected to VDD. |
| 8 | PGED2/SDI1/CTED11/CN16/RB10 | bidirectional | ICSP/debug data pin 2 multiplexed with SPI1 serial data input and CTMU edge input CTED11; ST input buffer. |
| 9 | PGEC2/SCK1/CTED9/CN15/RB11 | bidirectional | ICSP/debug clock pin 2 multiplexed with SPI1 serial clock and CTMU edge input CTED9; ST input buffer. |
| 10 | AN12/HLVDIN/CTED2/INT2/CN14/RB12 | bidirectional | A/D analog input AN12 multiplexed with High/Low-Voltage Detect input HLVDIN and external interrupt INT2; ST digital input buffer. |
| 11 | AN11/SDO1/CTPLS/CN13/RB13 | bidirectional | A/D analog input AN11 multiplexed with SPI1 serial data output SDO1 and CTMU pulse output CTPLS. |
| 12 | OC3/CN35/RA10 | bidirectional | Output Compare/PWM3 output multiplexed on RA10 with Change Notification input CN35. |
| 13 | IC3/CTED8/CN36/RA11 | bidirectional | Input Capture 3 input multiplexed on RA11 with CTMU trigger edge input CTED8; ST input buffer. |
| 14 | CVREF/AN10/C3INB/RTCC/C1OUT/OCFA/CTED5/INT1/CN12/RB14 | bidirectional | Comparator voltage reference output CVREF multiplexed with A/D input AN10, RTCC output and external interrupt INT1; ST input buffer. |
| 15 | AN9/C3INA/T3CK/T2CK/REFO/SS1/CTED6/CN11/RB15 | bidirectional | A/D analog input AN9 multiplexed with Timer2/Timer3 clock inputs, reference clock output REFO and SPI1 slave select SS1. |
| 16 | VSS/AVSS | power_in | Device digital ground return, also the A/D analog ground AVSS, which must always be connected regardless of analog module use. |
| 17 | VDD/AVDD | power_in | Device digital supply (2.0V to 5.5V for PIC24FV devices) also feeding A/D supply AVDD, which must always be connected. |
| 18 | MCLR/VPP/RA5 | bidirectional | Master Clear (device reset) input, active-low, with ST input buffer; also VPP programming pin and PORTA pin RA5. |
| 19 | VREF+/CVREF+/AN0/C3INC/CTED1/CN2/RA0 | power_in | A/D Reference Voltage Input (+) multiplexed with comparator reference input CVREF+, analog input AN0 and PORTA pin RA0. |
| 20 | CVREF-/VREF-/AN1/CN3/RA1 | bidirectional | A/D Reference Voltage Input (-) multiplexed with comparator reference input CVREF-, analog input AN1 and PORTA pin RA1. |
| 21 | PGED1/AN2/ULPWU/CTCMP/C1IND/C2INB/C3IND/U2TX/CN4/RB0 | bidirectional | ICSP/debug data pin 1 multiplexed with analog input AN2, Ultra Low-Power Wake-up input ULPWU and UART2 transmit U2TX. |
| 22 | PGEC1/AN3/C1INC/C2INA/U2RX/CTED12/CN5/RB1 | bidirectional | ICSP/debug clock pin 1 multiplexed with analog input AN3, comparator inputs and UART2 receive U2RX. |
| 23 | RB2 | bidirectional | A/D analog input AN4 multiplexed with I2C2 data SDA2 and Timer4/Timer5 clock inputs; I2C buffer. |
| 24 | AN5/C1INA/C2INC/SCL2/CN7/RB3 | bidirectional | A/D analog input AN5 multiplexed with I2C2 clock SCL2 and comparator input; I2C buffer. |
| 25 | AN6/CN32/RC0 | bidirectional | A/D analog input AN6 multiplexed on RC0 with Change Notification input CN32. |
| 26 | AN7/CN31/RC1 | bidirectional | A/D analog input AN7 multiplexed on RC1 with Change Notification input CN31. |
| 27 | AN8/CN10/RC2 | bidirectional | A/D analog input AN8 multiplexed on RC2 with Change Notification input CN10. |
| 28 | VDD | power_in | Device digital supply voltage, 2.0V to 5.5V for PIC24FV devices; all VDD pins must be connected. |
| 29 | VSS | power_in | Device digital ground return; all VSS pins must be connected. |
| 30 | OSCI/AN13/CLKI/CN30/RA2 | bidirectional | Primary oscillator input for XT, HS and EC modes, also external clock input CLKI and A/D analog input AN13. |
| 31 | OSCO/AN14/CLKO/CN29/RA3 | bidirectional | Primary oscillator output, also system clock output CLKO (FOSC/2) in some operating modes and A/D analog input AN14. |
| 32 | OCFB/CN33/RA8 | bidirectional | Output Compare Fault B input multiplexed on RA8 with Change Notification input CN33. |
| 33 | SOSCI/AN15/U2RTS/CN1/RB4 | bidirectional | Secondary (Timer1) oscillator input multiplexed with A/D analog input AN15 and UART2 RTS output. |
| 34 | SOSCO/SCLKI/U2CTS/CN0/RA4 | bidirectional | Secondary oscillator output, also digital secondary clock input SCLKI and UART2 CTS input. |
| 35 | SS2/CN34/RA9 | bidirectional | SPI2 slave select multiplexed on RA9 with Change Notification input CN34; ST input buffer. |
| 36 | SDI2/CN28/RC3 | bidirectional | SPI2 serial data input multiplexed on RC3 with Change Notification input CN28; ST input buffer. |
| 37 | SDO2/CN25/RC4 | bidirectional | SPI2 serial data output multiplexed on RC4 with Change Notification input CN25. |
| 38 | SCK2/CN26/RC5 | bidirectional | SPI2 serial clock input/output multiplexed on RC5 with Change Notification input CN26; ST input buffer. |
| 39 | VSS | power_in | Device digital ground return; all VSS pins must be connected. |
| 40 | VDD | power_in | Device digital supply voltage, 2.0V to 5.5V for PIC24FV devices; all VDD pins must be connected. |
| 41 | RB5 | bidirectional | ICSP/debug data pin 3 multiplexed with alternate I2C1 data ASDA1 (when the I2CSEL Configuration bit is set) and Change Notification input CN27. |
| 42 | RB6 | bidirectional | ICSP/debug clock pin 3 multiplexed with alternate I2C1 clock ASCL1 (when the I2CSEL Configuration bit is set) and Change Notification input CN24. |
| 43 | C2OUT/OC1/INT0/CN23/RB7 | bidirectional | Comparator 2 output multiplexed with Output Compare/PWM1 output OC1, external interrupt INT0 (ST input) and Change Notification input CN23. |
| 44 | SCL1/U1CTS/C3OUT/CTED10/CN22/RB8 | bidirectional | I2C1 clock input/output SCL1 multiplexed with UART1 CTS input, Comparator 3 output and CTMU edge input CTED10; ST input buffer. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | TQFP-44(10x10) |
| Category | Embedded Processors & Controllers |
| Pins | 44 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Ambient temperature under bias | -40 | 125 | °C | 263 | |||
| Storage temperature | -65 | 150 | °C | 263 | |||
| Voltage on VDD with respect to VSS (PIC24FVXXKA30X) | -0.3 | 6.5 | V | 263 | |||
| Voltage on any combined analog and digital pin with respect to VSS (max VDD + 0.3V) | -0.3 | V | 263 | ||||
| Voltage on any digital only pin with respect to VSS (max VDD + 0.3V) | -0.3 | V | 263 | ||||
| Voltage on MCLR/VPP pin with respect to VSS | -0.3 | 9 | V | 263 | |||
| Operating Junction Temperature Range | TJ | -40 | 140 | °C | 265 | ||
| Operating Ambient Temperature Range (Industrial) | TA | -40 | 85 | °C | Industrial (-I); Standard Operating Conditions | 265 | |
| VDD Supply Voltage (FV devices) | VDD | 2 | 5.5 | V | For FV devices | 265 | |
| RAM Data Retention Voltage (FV devices) | VDR | 1.7 | V | For FV devices | 265 | ||
| VDD Start Voltage to Ensure Internal Power-on Reset Signal | VPOR | 50 | mV | VDD must be maintained in this range for at least 64ms | 265 | ||
| VDD Rise Rate to Ensure Internal Power-on Reset Signal | SVDD | 0.05 | V/ms | 0-3.3V in 0.1s; 0-2.5V in 60 ms | 265 | ||
| HLVD Voltage on VDD Transition | VHLVD | 1.86 | 2.13 | V | HLVDL<3:0> = 0001 | 266 | |
| HLVD Voltage on VDD Transition | VHLVD | 2.08 | 2.35 | V | HLVDL<3:0> = 0010 | 266 | |
| HLVD Voltage on VDD Transition | VHLVD | 2.22 | 2.53 | V | HLVDL<3:0> = 0011 | 266 | |
| HLVD Voltage on VDD Transition | VHLVD | 2.3 | 2.62 | V | HLVDL<3:0> = 0100 | 266 | |
| HLVD Voltage on VDD Transition | VHLVD | 2.49 | 2.84 | V | HLVDL<3:0> = 0101 | 266 | |
| HLVD Voltage on VDD Transition | VHLVD | 2.73 | 3.1 | V | HLVDL<3:0> = 0110 | 266 | |
| HLVD Voltage on VDD Transition | VHLVD | 2.86 | 3.25 | V | HLVDL<3:0> = 0111 | 266 | |
| HLVD Voltage on VDD Transition | VHLVD | 3 | 3.41 | V | HLVDL<3:0> = 1000 | 266 | |
| HLVD Voltage on VDD Transition | VHLVD | 3.16 | 3.59 | V | HLVDL<3:0> = 1001 | 266 | |
| HLVD Voltage on VDD Transition | VHLVD | 3.33 | 3.79 | V | HLVDL<3:0> = 1010 | 266 | |
| HLVD Voltage on VDD Transition | VHLVD | 3.53 | 4.01 | V | HLVDL<3:0> = 1011 | 266 | |
| HLVD Voltage on VDD Transition | VHLVD | 3.74 | 4.26 | V | HLVDL<3:0> = 1100 | 266 | |
| HLVD Voltage on VDD Transition | VHLVD | 4 | 4.55 | V | HLVDL<3:0> = 1101 | 266 | |
| HLVD Voltage on VDD Transition | VHLVD | 4.28 | 4.87 | V | HLVDL<3:0> = 1110 | 266 | |
| BOR Voltage on VDD Transition | BOR | 2.9 | 3 | 3.38 | V | BORV<1:0> = 01 | 266 |
| BOR Voltage on VDD Transition | BOR | 2.53 | 2.7 | 3.07 | V | BORV<1:0> = 10 | 266 |
| BOR Voltage on VDD Transition (PIC24FV) | BOR | 1.95 | 2.05 | 2.16 | V | BORV<1:0> = 11; PIC24FV (Note 3) | 266 |
| Operating Current (IDD) | IDD | 269 | 450 | µA | 2.0V; 0.5 MIPS, FOSC = 1 MHz | 267 | |
| Operating Current (IDD) | IDD | 465 | 830 | µA | 5.0V; 0.5 MIPS, FOSC = 1 MHz | 267 | |
| Operating Current (IDD) | IDD | 13 | 20 | mA | 5.0V; 16 MIPS, FOSC = 32 MHz | 267 | |
| Operating Current (IDD) LPRC | IDD | 48 | 250 | µA | 2.0V; LPRC (15.5 KIPS), FOSC = 31 kHz | 267 | |
| Operating Current (IDD) LPRC | IDD | 75 | 450 | µA | 5.0V; LPRC (15.5 KIPS), FOSC = 31 kHz | 267 | |
| Idle Current (IIDLE) | IIDLE | 120 | 200 | µA | 2.0V; 0.5 MIPS, FOSC = 1 MHz | 268 | |
| Idle Current (IIDLE) | IIDLE | 160 | 430 | µA | 5.0V; 0.5 MIPS, FOSC = 1 MHz | 268 | |
| Idle Current (IIDLE) | IIDLE | 3.1 | 6.5 | mA | 5.0V; 16 MIPS, FOSC = 32 MHz | 268 | |
| Idle Current (IIDLE) LPRC | IIDLE | 60 | 200 | µA | 2.0V; LPRC (15.5 KIPS), FOSC = 31 kHz | 268 | |
| Idle Current (IIDLE) LPRC | IIDLE | 70 | 350 | µA | 5.0V; LPRC (15.5 KIPS), FOSC = 31 kHz | 268 | |
| Power-Down Current, Sleep Mode | IPD | 15 | µA | +125°C; 2.0V; Sleep Mode | 269 | ||
| Low-Voltage Sleep Mode Current | IPD | 0.35 | 3 | µA | +85°C; 5.0V | 269 | |
| Low-Voltage Sleep Mode Current | IPD | 7.5 | µA | +125°C; 5.0V | 269 | ||
| Deep Sleep Mode Current | IPD | 0.1 | 2 | µA | +85°C; 5.0V | 269 | |
| Deep Sleep Mode Current | IPD | 6 | µA | +125°C; 5.0V | 269 | ||
| Watchdog Timer Current | IWDT | 0.7 | 1.5 | µA | +85°C; 5.0V | 270 | |
| 32 kHz Crystal with RTCC, DSWDT or Timer1 Current | ISOSC | 1.5 | 2 | µA | +85°C; 5.0V; SOSCSEL = 0 | 270 | |
| HLVD Module Differential Current | IHLVD | 8.1 | 14 | µA | +85°C; 5.0V | 270 | |
| HLVD Module Differential Current | IHLVD | 14 | µA | +125°C; 5.0V | 270 | ||
| BOR Module Differential Current | IBOR | 6.5 | 11.2 | µA | -40°C; 5.0V | 270 | |
| BOR Module Differential Current | IBOR | 11.2 | µA | +125°C; 5.0V | 270 | ||
| Deep Sleep BOR Current | ILPBOR | 0.05 | 0.2 | µA | +85°C; 5.0V | 271 | |
| Deep Sleep BOR Current | ILPBOR | 0.3 | µA | +125°C; 5.0V | 271 | ||
| Deep Sleep WDT Current (LPRC) | IDSWDT | 0.7 | 1.5 | µA | +85°C; 5.0V | 271 |
CAD (KiCad official)
- Symbol:
PIC24FV32KA304T-I - Footprint:
Package_QFP:TQFP-44_10x10mm_P0.8mm - 3D model: TQFP-44(10x10) (KiCad packages3D, STEP)
- 3D model files:
pic24fv32ka304t-i-etched.step/pic24fv32ka304t-i-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pic24fv32ka304t-i.step/pic24fv32ka304t-i.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (366 pp, sha256
6d14c0d7696e79ad, retrieved 2026-10-21, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# PIC24FV32KA304T-I
**Microchip Tech** · Microcontrollers (MCU/MPU/SOC) · TQFP-44(10x10)
PIC24FV32KA304T-I from Microchip Tech, in a TQFP-44(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SDA1/T1CK/U1RTS/CTED4/CN21/RB9 | bidirectional | I2C1 data input/output (SDA1) multiplexed with Timer1 clock input, UART1 RTS and CTMU edge input; ST input buffer with 18 mA/18 mA high-current sink/source capability. |
| 2 | U1RX/CN18/RC6 | bidirectional | UART1 receive input multiplexed on RC6 with Change Notification input CN18; ST input buffer. |
| 3 | U1TX/CN17/RC7 | bidirectional | UART1 transmit output multiplexed on RC7 with Change Notification input CN17. |
| 4 | OC2/CN20/RC8 | bidirectional | Output Compare/PWM2 output multiplexed on RC8 with Change Notification input CN20. |
| 5 | IC2/CTED7/CN19/RC9 | bidirectional | Input Capture 2 input multiplexed on RC9 with CTMU trigger edge input CTED7; ST input buffer. |
| 6 | IC1/CTED3/CN9/RA7 | bidirectional | Input Capture 1 input multiplexed on RA7 with CTMU trigger edge input CTED3; ST input buffer. |
| 7 | VCAP | power_out | Voltage regulator output on FV devices; requires a 10 µF capacitor connected to ground and must not be connected to VDD. |
| 8 | PGED2/SDI1/CTED11/CN16/RB10 | bidirectional | ICSP/debug data pin 2 multiplexed with SPI1 serial data input and CTMU edge input CTED11; ST input buffer. |
| 9 | PGEC2/SCK1/CTED9/CN15/RB11 | bidirectional | ICSP/debug clock pin 2 multiplexed with SPI1 serial clock and CTMU edge input CTED9; ST input buffer. |
| 10 | AN12/HLVDIN/CTED2/INT2/CN14/RB12 | bidirectional | A/D analog input AN12 multiplexed with High/Low-Voltage Detect input HLVDIN and external interrupt INT2; ST digital input buffer. |
| 11 | AN11/SDO1/CTPLS/CN13/RB13 | bidirectional | A/D analog input AN11 multiplexed with SPI1 serial data output SDO1 and CTMU pulse output CTPLS. |
| 12 | OC3/CN35/RA10 | bidirectional | Output Compare/PWM3 output multiplexed on RA10 with Change Notification input CN35. |
| 13 | IC3/CTED8/CN36/RA11 | bidirectional | Input Capture 3 input multiplexed on RA11 with CTMU trigger edge input CTED8; ST input buffer. |
| 14 | CVREF/AN10/C3INB/RTCC/C1OUT/OCFA/CTED5/INT1/CN12/RB14 | bidirectional | Comparator voltage reference output CVREF multiplexed with A/D input AN10, RTCC output and external interrupt INT1; ST input buffer. |
| 15 | AN9/C3INA/T3CK/T2CK/REFO/SS1/CTED6/CN11/RB15 | bidirectional | A/D analog input AN9 multiplexed with Timer2/Timer3 clock inputs, reference clock output REFO and SPI1 slave select SS1. |
| 16 | VSS/AVSS | power_in | Device digital ground return, also the A/D analog ground AVSS, which must always be connected regardless of analog module use. |
| 17 | VDD/AVDD | power_in | Device digital supply (2.0V to 5.5V for PIC24FV devices) also feeding A/D supply AVDD, which must always be connected. |
| 18 | MCLR/VPP/RA5 | bidirectional | Master Clear (device reset) input, active-low, with ST input buffer; also VPP programming pin and PORTA pin RA5. |
| 19 | VREF+/CVREF+/AN0/C3INC/CTED1/CN2/RA0 | power_in | A/D Reference Voltage Input (+) multiplexed with comparator reference input CVREF+, analog input AN0 and PORTA pin RA0. |
| 20 | CVREF-/VREF-/AN1/CN3/RA1 | bidirectional | A/D Reference Voltage Input (-) multiplexed with comparator reference input CVREF-, analog input AN1 and PORTA pin RA1. |
| 21 | PGED1/AN2/ULPWU/CTCMP/C1IND/C2INB/C3IND/U2TX/CN4/RB0 | bidirectional | ICSP/debug data pin 1 multiplexed with analog input AN2, Ultra Low-Power Wake-up input ULPWU and UART2 transmit U2TX. |
| 22 | PGEC1/AN3/C1INC/C2INA/U2RX/CTED12/CN5/RB1 | bidirectional | ICSP/debug clock pin 1 multiplexed with analog input AN3, comparator inputs and UART2 receive U2RX. |
| 23 | RB2 | bidirectional | A/D analog input AN4 multiplexed with I2C2 data SDA2 and Timer4/Timer5 clock inputs; I2C buffer. |
| 24 | AN5/C1INA/C2INC/SCL2/CN7/RB3 | bidirectional | A/D analog input AN5 multiplexed with I2C2 clock SCL2 and comparator input; I2C buffer. |
| 25 | AN6/CN32/RC0 | bidirectional | A/D analog input AN6 multiplexed on RC0 with Change Notification input CN32. |
| 26 | AN7/CN31/RC1 | bidirectional | A/D analog input AN7 multiplexed on RC1 with Change Notification input CN31. |
| 27 | AN8/CN10/RC2 | bidirectional | A/D analog input AN8 multiplexed on RC2 with Change Notification input CN10. |
| 28 | VDD | power_in | Device digital supply voltage, 2.0V to 5.5V for PIC24FV devices; all VDD pins must be connected. |
| 29 | VSS | power_in | Device digital ground return; all VSS pins must be connected. |
| 30 | OSCI/AN13/CLKI/CN30/RA2 | bidirectional | Primary oscillator input for XT, HS and EC modes, also external clock input CLKI and A/D analog input AN13. |
| 31 | OSCO/AN14/CLKO/CN29/RA3 | bidirectional | Primary oscillator output, also system clock output CLKO (FOSC/2) in some operating modes and A/D analog input AN14. |
| 32 | OCFB/CN33/RA8 | bidirectional | Output Compare Fault B input multiplexed on RA8 with Change Notification input CN33. |
| 33 | SOSCI/AN15/U2RTS/CN1/RB4 | bidirectional | Secondary (Timer1) oscillator input multiplexed with A/D analog input AN15 and UART2 RTS output. |
| 34 | SOSCO/SCLKI/U2CTS/CN0/RA4 | bidirectional | Secondary oscillator output, also digital secondary clock input SCLKI and UART2 CTS input. |
| 35 | SS2/CN34/RA9 | bidirectional | SPI2 slave select multiplexed on RA9 with Change Notification input CN34; ST input buffer. |
| 36 | SDI2/CN28/RC3 | bidirectional | SPI2 serial data input multiplexed on RC3 with Change Notification input CN28; ST input buffer. |
| 37 | SDO2/CN25/RC4 | bidirectional | SPI2 serial data output multiplexed on RC4 with Change Notification input CN25. |
| 38 | SCK2/CN26/RC5 | bidirectional | SPI2 serial clock input/output multiplexed on RC5 with Change Notification input CN26; ST input buffer. |
| 39 | VSS | power_in | Device digital ground return; all VSS pins must be connected. |
| 40 | VDD | power_in | Device digital supply voltage, 2.0V to 5.5V for PIC24FV devices; all VDD pins must be connected. |
| 41 | RB5 | bidirectional | ICSP/debug data pin 3 multiplexed with alternate I2C1 data ASDA1 (when the I2CSEL Configuration bit is set) and Change Notification input CN27. |
| 42 | RB6 | bidirectional | ICSP/debug clock pin 3 multiplexed with alternate I2C1 clock ASCL1 (when the I2CSEL Configuration bit is set) and Change Notification input CN24. |
| 43 | C2OUT/OC1/INT0/CN23/RB7 | bidirectional | Comparator 2 output multiplexed with Output Compare/PWM1 output OC1, external interrupt INT0 (ST input) and Change Notification input CN23. |
| 44 | SCL1/U1CTS/C3OUT/CTED10/CN22/RB8 | bidirectional | I2C1 clock input/output SCL1 multiplexed with UART1 CTS input, Comparator 3 output and CTMU edge input CTED10; ST input buffer. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | TQFP-44(10x10) |
| Category | Embedded Processors & Controllers |
| Pins | 44 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Ambient temperature under bias | | -40 | | 125 | °C | | 263 |
| Storage temperature | | -65 | | 150 | °C | | 263 |
| Voltage on VDD with respect to VSS (PIC24FVXXKA30X) | | -0.3 | | 6.5 | V | | 263 |
| Voltage on any combined analog and digital pin with respect to VSS (max VDD + 0.3V) | | -0.3 | | | V | | 263 |
| Voltage on any digital only pin with respect to VSS (max VDD + 0.3V) | | -0.3 | | | V | | 263 |
| Voltage on MCLR/VPP pin with respect to VSS | | -0.3 | | 9 | V | | 263 |
| Operating Junction Temperature Range | TJ | -40 | | 140 | °C | | 265 |
| Operating Ambient Temperature Range (Industrial) | TA | -40 | | 85 | °C | Industrial (-I); Standard Operating Conditions | 265 |
| VDD Supply Voltage (FV devices) | VDD | 2 | | 5.5 | V | For FV devices | 265 |
| RAM Data Retention Voltage (FV devices) | VDR | 1.7 | | | V | For FV devices | 265 |
| VDD Start Voltage to Ensure Internal Power-on Reset Signal | VPOR | | | 50 | mV | VDD must be maintained in this range for at least 64ms | 265 |
| VDD Rise Rate to Ensure Internal Power-on Reset Signal | SVDD | 0.05 | | | V/ms | 0-3.3V in 0.1s; 0-2.5V in 60 ms | 265 |
| HLVD Voltage on VDD Transition | VHLVD | 1.86 | | 2.13 | V | HLVDL<3:0> = 0001 | 266 |
| HLVD Voltage on VDD Transition | VHLVD | 2.08 | | 2.35 | V | HLVDL<3:0> = 0010 | 266 |
| HLVD Voltage on VDD Transition | VHLVD | 2.22 | | 2.53 | V | HLVDL<3:0> = 0011 | 266 |
| HLVD Voltage on VDD Transition | VHLVD | 2.3 | | 2.62 | V | HLVDL<3:0> = 0100 | 266 |
| HLVD Voltage on VDD Transition | VHLVD | 2.49 | | 2.84 | V | HLVDL<3:0> = 0101 | 266 |
| HLVD Voltage on VDD Transition | VHLVD | 2.73 | | 3.1 | V | HLVDL<3:0> = 0110 | 266 |
| HLVD Voltage on VDD Transition | VHLVD | 2.86 | | 3.25 | V | HLVDL<3:0> = 0111 | 266 |
| HLVD Voltage on VDD Transition | VHLVD | 3 | | 3.41 | V | HLVDL<3:0> = 1000 | 266 |
| HLVD Voltage on VDD Transition | VHLVD | 3.16 | | 3.59 | V | HLVDL<3:0> = 1001 | 266 |
| HLVD Voltage on VDD Transition | VHLVD | 3.33 | | 3.79 | V | HLVDL<3:0> = 1010 | 266 |
| HLVD Voltage on VDD Transition | VHLVD | 3.53 | | 4.01 | V | HLVDL<3:0> = 1011 | 266 |
| HLVD Voltage on VDD Transition | VHLVD | 3.74 | | 4.26 | V | HLVDL<3:0> = 1100 | 266 |
| HLVD Voltage on VDD Transition | VHLVD | 4 | | 4.55 | V | HLVDL<3:0> = 1101 | 266 |
| HLVD Voltage on VDD Transition | VHLVD | 4.28 | | 4.87 | V | HLVDL<3:0> = 1110 | 266 |
| BOR Voltage on VDD Transition | BOR | 2.9 | 3 | 3.38 | V | BORV<1:0> = 01 | 266 |
| BOR Voltage on VDD Transition | BOR | 2.53 | 2.7 | 3.07 | V | BORV<1:0> = 10 | 266 |
| BOR Voltage on VDD Transition (PIC24FV) | BOR | 1.95 | 2.05 | 2.16 | V | BORV<1:0> = 11; PIC24FV (Note 3) | 266 |
| Operating Current (IDD) | IDD | | 269 | 450 | µA | 2.0V; 0.5 MIPS, FOSC = 1 MHz | 267 |
| Operating Current (IDD) | IDD | | 465 | 830 | µA | 5.0V; 0.5 MIPS, FOSC = 1 MHz | 267 |
| Operating Current (IDD) | IDD | | 13 | 20 | mA | 5.0V; 16 MIPS, FOSC = 32 MHz | 267 |
| Operating Current (IDD) LPRC | IDD | | 48 | 250 | µA | 2.0V; LPRC (15.5 KIPS), FOSC = 31 kHz | 267 |
| Operating Current (IDD) LPRC | IDD | | 75 | 450 | µA | 5.0V; LPRC (15.5 KIPS), FOSC = 31 kHz | 267 |
| Idle Current (IIDLE) | IIDLE | | 120 | 200 | µA | 2.0V; 0.5 MIPS, FOSC = 1 MHz | 268 |
| Idle Current (IIDLE) | IIDLE | | 160 | 430 | µA | 5.0V; 0.5 MIPS, FOSC = 1 MHz | 268 |
| Idle Current (IIDLE) | IIDLE | | 3.1 | 6.5 | mA | 5.0V; 16 MIPS, FOSC = 32 MHz | 268 |
| Idle Current (IIDLE) LPRC | IIDLE | | 60 | 200 | µA | 2.0V; LPRC (15.5 KIPS), FOSC = 31 kHz | 268 |
| Idle Current (IIDLE) LPRC | IIDLE | | 70 | 350 | µA | 5.0V; LPRC (15.5 KIPS), FOSC = 31 kHz | 268 |
| Power-Down Current, Sleep Mode | IPD | | | 15 | µA | +125°C; 2.0V; Sleep Mode | 269 |
| Low-Voltage Sleep Mode Current | IPD | | 0.35 | 3 | µA | +85°C; 5.0V | 269 |
| Low-Voltage Sleep Mode Current | IPD | | | 7.5 | µA | +125°C; 5.0V | 269 |
| Deep Sleep Mode Current | IPD | | 0.1 | 2 | µA | +85°C; 5.0V | 269 |
| Deep Sleep Mode Current | IPD | | | 6 | µA | +125°C; 5.0V | 269 |
| Watchdog Timer Current | IWDT | | 0.7 | 1.5 | µA | +85°C; 5.0V | 270 |
| 32 kHz Crystal with RTCC, DSWDT or Timer1 Current | ISOSC | | 1.5 | 2 | µA | +85°C; 5.0V; SOSCSEL = 0 | 270 |
| HLVD Module Differential Current | IHLVD | | 8.1 | 14 | µA | +85°C; 5.0V | 270 |
| HLVD Module Differential Current | IHLVD | | | 14 | µA | +125°C; 5.0V | 270 |
| BOR Module Differential Current | IBOR | | 6.5 | 11.2 | µA | -40°C; 5.0V | 270 |
| BOR Module Differential Current | IBOR | | | 11.2 | µA | +125°C; 5.0V | 270 |
| Deep Sleep BOR Current | ILPBOR | | 0.05 | 0.2 | µA | +85°C; 5.0V | 271 |
| Deep Sleep BOR Current | ILPBOR | | | 0.3 | µA | +125°C; 5.0V | 271 |
| Deep Sleep WDT Current (LPRC) | IDSWDT | | 0.7 | 1.5 | µA | +85°C; 5.0V | 271 |
## CAD (KiCad official)
- Symbol: `PIC24FV32KA304T-I`
- Footprint: `Package_QFP:TQFP-44_10x10mm_P0.8mm`
- 3D model: TQFP-44(10x10) (KiCad packages3D, STEP)
- 3D model files: `pic24fv32ka304t-i-etched.step` / `pic24fv32ka304t-i-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `pic24fv32ka304t-i.step` / `pic24fv32ka304t-i.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Microchip Tech datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589805691415261184) (366 pp, sha256 `6d14c0d7696e79ad`, retrieved 2026-10-21, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/pic24fv32ka304t-i-datasheet.pdf)