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PIC24FV32KA304-I

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Microchip Tech Microcontrollers (MCU/MPU/SOC), TQFP-44(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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PIC24FV32KA304-I

Microchip Tech · Microcontrollers (MCU/MPU/SOC) · TQFP-44(10x10)

PIC24FV32KA304-I from Microchip Tech, in a TQFP-44(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SDA1/T1CK/U1RTS/CTED4/CN21/RB9 bidirectional I2C1 data input/output (SDA1) on RB9, also Timer1 clock input, UART1 RTS output, CTMU trigger edge input and change notification input, with ST input buffer.
2 U1RX/CN18/RC6 bidirectional UART1 receive input (U1RX) on RC6, also change notification input CN18, with ST input buffer.
3 U1TX/CN17/RC7 bidirectional UART1 transmit output (U1TX) on RC7, also change notification input CN17.
4 OC2/CN20/RC8 bidirectional Output Compare/PWM2 output (OC2) on RC8, also change notification input CN20.
5 IC2/CTED7/CN19/RC9 bidirectional Input Capture 2 input (IC2) on RC9, also CTMU trigger edge input CTED7 and change notification input CN19, with ST input buffer.
6 IC1/CTED3/CN9/RA7 bidirectional Input Capture 1 input (IC1) on RA7, also CTMU trigger edge input CTED3 and change notification input CN9, with ST input buffer.
7 VCAP power_out On-chip voltage regulator output for the core; it must not be connected to VDD and requires a 10 µF capacitor to ground.
8 PGED2/SDI1/CTED11/CN16/RB10 bidirectional ICSP data 2 (PGED2) on RB10, also SPI1 serial data input (SDI1), CTMU trigger edge input CTED11 and change notification input CN16, with ST input buffer.
9 PGEC2/SCK1/CTED9/CN15/RB11 bidirectional ICSP clock 2 (PGEC2) on RB11, also SPI1 serial clock (SCK1), CTMU trigger edge input CTED9 and change notification input CN15, with ST input buffer.
10 AN12/HLVDIN/CTED2/INT2/CN14/RB12 bidirectional Analog input AN12 on RB12, also High/Low-Voltage Detect input (HLVDIN), external interrupt 2 (INT2), CTMU trigger edge input CTED2 and change notification input CN14.
11 AN11/SDO1/CTPLS/CN13/RB13 bidirectional Analog input AN11 on RB13, also SPI1 serial data output (SDO1), CTMU pulse output (CTPLS) and change notification input CN13.
12 OC3/CN35/RA10 bidirectional Output Compare/PWM3 output (OC3) on RA10, also change notification input CN35, with ST input buffer.
13 IC3/CTED8/CN36/RA11 bidirectional Input Capture 3 input (IC3) on RA11, also CTMU trigger edge input CTED8 and change notification input CN36, with ST input buffer.
14 CVREF/AN10/C3INB/RTCC/C1OUT/OCFA/CTED5/INT1/CN12/RB14 bidirectional Comparator voltage reference output (CVREF) and analog input AN10 on RB14, also comparator 3 input B, RTCC output, comparator 1 output, Output Compare Fault A, external interrupt 1 (INT1) and change notification input CN12.
15 AN9/C3INA/T3CK/T2CK/REFO/SS1/CTED6/CN11/RB15 bidirectional Analog input AN9 on RB15, also comparator 3 input A, Timer2/Timer3 clock input, reference clock output (REFO), SPI1 slave select (SS1) and change notification input CN11.
16 VSS/AVSS power_in Digital ground return (VSS) and analog ground (AVSS); both must be connected regardless of whether the analog modules are used.
17 VDD/AVDD power_in Digital supply (VDD) and A/D supply (AVDD); for PIC24FV devices VDD operates over 2.0V to 5.5V, and AVDD must always be connected.
18 MCLR/VPP/RA5 input Master Clear input (MCLR, active-low) for device Reset and programming/debug, with ST input buffer; the pin can also be used as RA5 I/O when MCLR is not selected.
19 VREF+/CVREF+/AN0/C3INC/CTED1/CN2/RA0 power_in A/D positive voltage reference input (VREF+) on RA0, also analog input AN0, comparator reference positive input CVREF+, comparator 3 input C and change notification input CN2.
20 CVREF-/VREF-/AN1/CN3/RA1 bidirectional A/D negative voltage reference input (VREF-) on RA1, also analog input AN1, comparator reference negative input CVREF- and change notification input CN3.
21 PGED1/AN2/ULPWU/CTCMP/C1IND/C2INB/C3IND/U2TX/CN4/RB0 bidirectional ICSP data 1 (PGED1) on RB0, also analog input AN2, Ultra Low-Power Wake-up input (ULPWU), CTMU comparator input (CTCMP), UART2 transmit (U2TX) and change notification input CN4.
22 PGEC1/AN3/C1INC/C2INA/U2RX/CTED12/CN5/RB1 bidirectional ICSP clock 1 (PGEC1) on RB1, also analog input AN3, comparator inputs C1INC and C2INA, UART2 receive (U2RX), CTMU trigger edge input CTED12 and change notification input CN5.
23 RB2 bidirectional Analog input AN4 on RB2, also comparator inputs C1INB and C2IND, I2C2 data (SDA2), Timer4/Timer5 clock input, CTMU trigger edge input CTED13 and change notification input CN6.
24 AN5/C1INA/C2INC/SCL2/CN7/RB3 bidirectional Analog input AN5 on RB3, also comparator inputs C1INA and C2INC, I2C2 clock (SCL2) and change notification input CN7.
25 AN6/CN32/RC0 bidirectional Analog input AN6 on RC0, also change notification input CN32, with ST input buffer.
26 AN7/CN31/RC1 bidirectional Analog input AN7 on RC1, also change notification input CN31, with ST input buffer.
27 AN8/CN10/RC2 bidirectional Analog input AN8 on RC2, also change notification input CN10, with ST input buffer.
28 VDD power_in Device digital supply pin (VDD), 2.0V to 5.5V for PIC24FV devices; all VDD pins must be connected.
29 VSS power_in Device digital ground return pin (VSS); all VSS pins must be connected.
30 OSCI/AN13/CLKI/CN30/RA2 bidirectional Main oscillator input (OSCI) and external clock input (CLKI) on RA2, also analog input AN13 and change notification input CN30.
31 OSCO/AN14/CLKO/CN29/RA3 bidirectional Main oscillator output (OSCO) on RA3, also system clock output (CLKO), analog input AN14 and change notification input CN29.
32 OCFB/CN33/RA8 bidirectional Output Compare Fault B input (OCFB) on RA8, also change notification input CN33, with ST input buffer.
33 SOSCI/AN15/U2RTS/CN1/RB4 bidirectional Secondary oscillator input (SOSCI) on RB4, also analog input AN15, UART2 RTS output (U2RTS) and change notification input CN1.
34 SOSCO/SCLKI/U2CTS/CN0/RA4 bidirectional Secondary oscillator output (SOSCO) on RA4, also digital secondary clock input (SCLKI), UART2 CTS input (U2CTS) and change notification input CN0.
35 SS2/CN34/RA9 bidirectional SPI2 slave select (SS2) on RA9, also change notification input CN34, with ST input buffer.
36 SDI2/CN28/RC3 bidirectional SPI2 serial data input (SDI2) on RC3, also change notification input CN28, with ST input buffer.
37 SDO2/CN25/RC4 bidirectional SPI2 serial data output (SDO2) on RC4, also change notification input CN25.
38 SCK2/CN26/RC5 bidirectional SPI2 serial clock input/output (SCK2) on RC5, also change notification input CN26, with ST input buffer.
39 VSS power_in Device digital ground return pin (VSS); all VSS pins must be connected.
40 VDD power_in Device digital supply pin (VDD); all VDD pins must be connected.
41 RB5 bidirectional ICSP data 3 (PGED3) on RB5, also alternate I2C1 data (ASDA1) when the I2CSEL Configuration bit is set and change notification input CN27.
42 RB6 bidirectional ICSP clock 3 (PGEC3) on RB6, also alternate I2C1 clock (ASCL1) when the I2CSEL Configuration bit is set and change notification input CN24.
43 C2OUT/OC1/INT0/CN23/RB7 bidirectional Comparator 2 output (C2OUT) on RB7, also Output Compare/PWM1 output (OC1), external interrupt 0 (INT0) and change notification input CN23, with ST input buffer on the input functions.
44 SCL1/U1CTS/C3OUT/CTED10/CN22/RB8 bidirectional I2C1 clock input/output (SCL1) on RB8, also UART1 CTS input (U1CTS), comparator 3 output (C3OUT), CTMU trigger edge input CTED10 and change notification input CN22.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package TQFP-44(10x10)
Category Embedded Processors & Controllers
Pins 44

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Voltage on VDD with respect to VSS (PIC24FVXXKA30X) -0.3 6.5 V 263
Voltage on any combined analog and digital pin with respect to VSS -0.3 V Upper limit printed as (VDD + 0.3V) 263
Voltage on any digital only pin with respect to VSS -0.3 V Upper limit printed as (VDD + 0.3V) 263
Voltage on MCLR/VPP pin with respect to VSS -0.3 9 V 263
Operating Junction Temperature Range TJ -40 140 °C 265
Operating Ambient Temperature Range TA -40 125 °C 265
Operating temperature (Industrial) TA -40 85 °C Industrial: -40°C ≤ TA ≤ +85°C 265
VDD Supply Voltage VDD 2 5.5 V For FV devices 265
RAM Data Retention Voltage VDR 1.7 V For FV devices 265
HLVD Voltage on VDD Transition VHLVD 1.86 2.13 V HLVDL<3:0> = 0001 266
HLVD Voltage on VDD Transition VHLVD 2.08 2.35 V HLVDL<3:0> = 0010 266
HLVD Voltage on VDD Transition VHLVD 2.22 2.53 V HLVDL<3:0> = 0011 266
HLVD Voltage on VDD Transition VHLVD 2.3 2.62 V HLVDL<3:0> = 0100 266
HLVD Voltage on VDD Transition VHLVD 2.49 2.84 V HLVDL<3:0> = 0101 266
HLVD Voltage on VDD Transition VHLVD 2.73 3.1 V HLVDL<3:0> = 0110 266
HLVD Voltage on VDD Transition VHLVD 2.86 3.25 V HLVDL<3:0> = 0111 266
HLVD Voltage on VDD Transition VHLVD 3 3.41 V HLVDL<3:0> = 1000 266
HLVD Voltage on VDD Transition VHLVD 3.16 3.59 V HLVDL<3:0> = 1001 266
HLVD Voltage on VDD Transition VHLVD 3.33 3.79 V HLVDL<3:0> = 1010 266
HLVD Voltage on VDD Transition VHLVD 3.53 4.01 V HLVDL<3:0> = 1011 266
HLVD Voltage on VDD Transition VHLVD 3.74 4.26 V HLVDL<3:0> = 1100 266
HLVD Voltage on VDD Transition VHLVD 4 4.55 V HLVDL<3:0> = 1101 266
HLVD Voltage on VDD Transition VHLVD 4.28 4.87 V HLVDL<3:0> = 1110 266
BOR Voltage on VDD Transition BOR 2.9 3 3.38 V BORV<1:0> = 01 266
BOR Voltage on VDD Transition BOR 2.53 2.7 3.07 V BORV<1:0> = 10 266
BOR Voltage on VDD Transition BOR 1.95 2.05 2.16 V BORV<1:0> = 11 (Note 3: valid for PIC24FV 5V devices) 266
Operating Current (IDD), 0.5 MIPS IDD 269 450 µA 2.0V, 0.5 MIPS, FOSC = 1 MHz (Note 1) 267
Operating Current (IDD), 0.5 MIPS IDD 465 830 µA 5.0V, 0.5 MIPS, FOSC = 1 MHz (Note 1) 267
Operating Current (IDD), 16 MIPS IDD 13 20 mA 5.0V, 16 MIPS, FOSC = 32 MHz (Note 1) 267
Operating Current (IDD), LPRC IDD 48 250 µA 2.0V, LPRC (15.5 KIPS), FOSC = 31 kHz 267
Operating Current (IDD), LPRC IDD 75 450 µA 5.0V, LPRC (15.5 KIPS), FOSC = 31 kHz 267
Idle Current (IIDLE), 0.5 MIPS IIDLE 120 200 µA 2.0V, 0.5 MIPS, FOSC = 1 MHz (Note 1) 268
Idle Current (IIDLE), 0.5 MIPS IIDLE 160 430 µA 5.0V, 0.5 MIPS, FOSC = 1 MHz (Note 1) 268
Idle Current (IIDLE), 16 MIPS IIDLE 3.1 6.5 mA 5.0V, 16 MIPS, FOSC = 32 MHz (Note 1) 268
Idle Current (IIDLE), LPRC IIDLE 60 200 µA 2.0V, LPRC (15.5 KIPS), FOSC = 31 kHz 268
Idle Current (IIDLE), LPRC IIDLE 70 350 µA 5.0V, LPRC (15.5 KIPS), FOSC = 31 kHz 268
Power-Down Current (IPD), Sleep Mode IPD 15 µA +125°C, 2.0V 269
Power-Down Current (IPD), Low-Voltage Sleep Mode IPD 0.35 3 µA +85°C, 5.0V (Note 2) 269
Power-Down Current (IPD), Low-Voltage Sleep Mode IPD 7.5 µA +125°C, 5.0V (Note 2) 269
Power-Down Current (IPD), Deep Sleep Mode IPD 0.1 2 µA +85°C, 5.0V 269
Power-Down Current (IPD), Deep Sleep Mode IPD 6 µA +125°C, 5.0V 269
Module Differential Current, Watchdog Timer IWDT IWDT 0.7 1.5 µA +85°C, 5.0V (Note 4) 270
Module Differential Current, Watchdog Timer IWDT IWDT 1.5 µA +125°C, 5.0V (Note 4) 270
Module Differential Current, 32 kHz Crystal ISOSC ISOSC 1.5 2 µA +85°C, 5.0V (SOSCSEL = 0) (Note 5) 270
Module Differential Current, 32 kHz Crystal ISOSC ISOSC 2 µA +125°C, 5.0V (SOSCSEL = 0) (Note 5) 270
Module Differential Current, HLVD IHLVD IHLVD 8.1 14 µA +85°C, 5.0V (Note 4) 270
Module Differential Current, HLVD IHLVD IHLVD 14 µA +125°C, 5.0V (Note 4) 270
Module Differential Current, BOR IBOR IBOR 6.5 11.2 µA -40°C, 5.0V (Note 4) 270
Module Differential Current, BOR IBOR IBOR 11.2 µA +125°C, 5.0V (Note 4) 270
Deep Sleep BOR ILPBOR ILPBOR 0.05 0.2 µA +85°C, 5.0V (Note 5) 271
Deep Sleep BOR ILPBOR ILPBOR 0.3 µA +125°C, 5.0V (Note 5) 271
Deep Sleep WDT IDSWDT (LPRC) IDSWDT 0.7 1.5 µA +85°C, 5.0V (Note 6) 271
Deep Sleep WDT IDSWDT (LPRC) IDSWDT 1.5 µA +125°C, 5.0V (Note 6) 271

CAD (KiCad official)

  • Symbol: PIC24FV32KA304-I
  • Footprint: Package_QFP:TQFP-44_10x10mm_P0.8mm
  • 3D model: TQFP-44(10x10) (KiCad packages3D, STEP)
  • 3D model files: pic24fv32ka304-i-etched.step / pic24fv32ka304-i-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pic24fv32ka304-i.step / pic24fv32ka304-i.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (366 pp, sha256 6d14c0d7696e79ad, retrieved 2026-10-20, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF