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PIC24FJ128GA705-I
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Microchip Tech Microcontroller Units (MCUs/MPUs/SOCs), TQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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PIC24FJ128GA705-I
Microchip Tech · Microcontroller Units (MCUs/MPUs/SOCs) · TQFP-48(7x7)
PIC24FJ128GA705-I from Microchip Tech, in a TQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | RB9 | bidirectional | PORTB digital I/O RB9 multiplexed with C1INC/C2INC/C3INC, TMPRN, RP9, SDA1, T1CK, CTED4 and PMD3; not 5.5V tolerant (VDD only). |
| 2 | RC6 | bidirectional | PORTC digital I/O RC6 multiplexed with RP22, PMA1/PMALH; 5.5V tolerant input. |
| 3 | RC7 | bidirectional | PORTC digital I/O RC7 multiplexed with RP23, PMA0/PMALL; 5.5V tolerant input. |
| 4 | RC8 | bidirectional | PORTC digital I/O RC8 multiplexed with RP24 and PMA5; 5.5V tolerant input. |
| 5 | RC9 | bidirectional | PORTC digital I/O RC9 multiplexed with RP25, CTED7 and PMA6; 5.5V tolerant input. |
| 6 | VSS | power_in | Ground reference for peripheral digital logic and I/O pins. |
| 7 | VCAP | passive | External filter capacitor connection for the on-chip regulator; requires a low-ESR (<5 ohm) 10 µF capacitor to ground and must not be connected to VDD. |
| 8 | RA11 | bidirectional | PORTA digital I/O RA11, also remappable input-only pin RPI29. |
| 9 | RB10 | bidirectional | PORTB digital I/O RB10 multiplexed with PGD2 (ICSP data), RP10, OCM1C, CTED11 and PMD2; 5.5V tolerant input. |
| 10 | RB11 | bidirectional | PORTB digital I/O RB11 multiplexed with PGC2 (ICSP clock), REFI1, RP11, CTED9 and PMD1; 5.5V tolerant input. |
| 11 | RB12 | bidirectional | PORTB digital I/O RB12 multiplexed with AN8, LVDIN, RP12 and PMD0. |
| 12 | RB13 | bidirectional | PORTB digital I/O RB13 multiplexed with AN7, C1INC, RP13, OCM1D, CTPLS and PMRD/PMWR. |
| 13 | RA10 | bidirectional | PORTA digital I/O RA10 multiplexed with TMS (JTAG mode select), RP28 and PMA2/PMALU. |
| 14 | RA7 | bidirectional | PORTA digital I/O RA7 multiplexed with TCK (JTAG clock) and PMA7. |
| 15 | RB14 | bidirectional | PORTB digital I/O RB14 multiplexed with CVREF output, AN6, C3INB, RP14, CTED5 and PMWR/PMENB. |
| 16 | RB15 | bidirectional | PORTB digital I/O RB15 multiplexed with AN9, C3INA, RP15, CTED6 and PMA14/PMCS/PMCS1. |
| 17 | AVSS | power_in | Ground reference for analog modules; must always be connected. |
| 18 | AVDD | power_in | Positive supply for analog modules; must always be connected. |
| 19 | MCLR | input | Master Clear (device Reset) input, active low, also used for programming and debugging. |
| 20 | RA12 | bidirectional | PORTA digital I/O RA12, also remappable input-only pin RPI30. |
| 21 | RA0 | bidirectional | PORTA digital I/O RA0 multiplexed with VREF+/CVREF+, AN0, C3INC, RP26 and CTED1. |
| 22 | RA1 | bidirectional | PORTA digital I/O RA1 multiplexed with VREF-/CVREF-, AN1, C3IND, RP27 and CTED2. |
| 23 | RB0 | bidirectional | PORTB digital I/O RB0 multiplexed with PGD1 (ICSP data), AN2, CTCMP, C2INB and RP0. |
| 24 | RB1 | bidirectional | PORTB digital I/O RB1 multiplexed with PGC1 (ICSP clock), AN1-, AN3, C2INA, RP1 and CTED12. |
| 25 | RB2 | bidirectional | PORTB digital I/O RB2 multiplexed with AN4, C1INB, RP2, SDA2 and CTED13. |
| 26 | RB3 | bidirectional | PORTB digital I/O RB3 multiplexed with AN5, C1INA, RP3, SCL2 and CTED8. |
| 27 | RC0 | bidirectional | PORTC digital I/O RC0 multiplexed with AN10, RP16 and PMBE1. |
| 28 | RC1 | bidirectional | PORTC digital I/O RC1 multiplexed with AN11, RP17, PMA15 and PMCS2. |
| 29 | RC2 | bidirectional | PORTC digital I/O RC2 multiplexed with AN12, RP18 and PMACK1. |
| 30 | VDD | power_in | Positive supply for peripheral digital logic and I/O pins (2.0V to 3.6V operating range). |
| 31 | VSS | power_in | Ground reference for peripheral digital logic and I/O pins. |
| 32 | RA13 | bidirectional | PORTA digital I/O RA13, also remappable input-only pin RPI31. |
| 33 | RA2 | bidirectional | PORTA digital I/O RA2 multiplexed with OSCI/CLKI main oscillator input and C1IND. |
| 34 | RA3 | bidirectional | PORTA digital I/O RA3 multiplexed with OSCO/CLKO main oscillator output and C2IND. |
| 35 | RA8 | bidirectional | PORTA digital I/O RA8 multiplexed with TDO (JTAG data out) and PMA8. |
| 36 | RB4 | bidirectional | PORTB digital I/O RB4 multiplexed with SOSCI secondary oscillator input and RP4. |
| 37 | RA4 | bidirectional | PORTA digital I/O RA4 multiplexed with SOSCO secondary oscillator output and PWRLCLK. |
| 38 | RA9 | bidirectional | PORTA digital I/O RA9 multiplexed with TDI (JTAG data in) and PMA9. |
| 39 | RC3 | bidirectional | PORTC digital I/O RC3 multiplexed with AN13, RP19 and PMBE0. |
| 40 | RC4 | bidirectional | PORTC digital I/O RC4 multiplexed with RP20 and PMA4. |
| 41 | RC5 | bidirectional | PORTC digital I/O RC5 multiplexed with RP21 and PMA3. |
| 42 | VSS | power_in | Ground reference for peripheral digital logic and I/O pins. |
| 43 | VDD | power_in | Positive supply for peripheral digital logic and I/O pins (2.0V to 3.6V operating range). |
| 44 | RA14 | bidirectional | PORTA digital I/O RA14, also remappable input-only pin RPI32. |
| 45 | RB5 | bidirectional | PORTB digital I/O RB5 multiplexed with PGD3 (ICSP data), RP5, ASDA1, OCM1E and PMD7; 5.5V tolerant input. |
| 46 | RB6 | bidirectional | PORTB digital I/O RB6 multiplexed with PGC3 (ICSP clock), RP6, ASCL1, OCM1F and PMD6; 5.5V tolerant input. |
| 47 | RB7 | bidirectional | PORTB digital I/O RB7 multiplexed with RP7, OCM1A, CTED3, PMD5 and INT0; 5.5V tolerant input. |
| 48 | RB8 | bidirectional | PORTB digital I/O RB8 multiplexed with RP8, SCL1, OCM1B, CTED10 and PMD4; 5.5V tolerant input. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | TQFP-48(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 48 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage Range | VDD | 2 | 3.6 | V | Standard Operating Conditions | 1 | |
| Operating Ambient Temperature | TA | -40 | 125 | °C | Extended (AEC-Q100 Grade 1) | 1 | |
| Ambient temperature under bias | -40 | 125 | °C | 353 | |||
| Storage temperature | -65 | 150 | °C | 353 | |||
| Voltage on VDD with respect to VSS | VDD | -0.3 | 4 | V | with respect to VSS | 353 | |
| Voltage on any general purpose digital or analog pin (not 5.5V tolerant) | -0.3 | V | with respect to VSS; max is VDD + 0.3V | 353 | |||
| Voltage on 5.5V tolerant pin, including MCLR | -0.3 | 4 | V | When VDD = 0V | 353 | ||
| Voltage on 5.5V tolerant pin, including MCLR | -0.3 | 6 | V | When VDD >= 2.0V | 353 | ||
| Voltage on AVSS with respect to VSS | AVSS | -0.3 | 0.3 | V | with respect to VSS | 353 | |
| Maximum current out of VSS pin | 300 | mA | 353 | ||||
| Port Output Rise Time | TIOR | 10 | 25 | ns | 370 | ||
| Port Output Fall Time | TIOF | 10 | 25 | ns | 370 | ||
| INTx Pin High or Low Time (input) | TINP | 1 | TCY | 370 | |||
| CNx High or Low Time (input) | TRBP | 1 | TCY | 370 | |||
| VCAP external capacitor value | CEFC | 10 | µF | low-ESR (< 5Ω) capacitor on VCAP to ground | 31 |
CAD (KiCad official)
- Symbol:
PIC24FJ128GA705-I - Footprint:
Package_QFP:TQFP-48_7x7mm_P0.5mm - 3D model: TQFP-48(7x7) (KiCad packages3D, STEP)
- 3D model files:
pic24fj128ga705-i-etched.step/pic24fj128ga705-i-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pic24fj128ga705-i.step/pic24fj128ga705-i.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (424 pp, sha256
0a5f346806df1dc3, retrieved 2026-10-27, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).