component

PIC24F16KA101-E

Public Made by Adom

by adom

Microchip Tech Microcontroller Units (MCUs/MPUs/SOCs), VQFN-20(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentsingle chip microcomputer-microcontrollerpic24f16ka101-efactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 3h ago
viewers pic24f16ka101-e: viewers · Ray 3h ago
package.json Publish 0.1.0 · Ray 3h ago
page.json Set visibility: public · Ray 3h ago
pic24f16ka101-e-etched.glb Publish 0.1.0 · Ray 3h ago
pic24f16ka101-e-etched.step pic24f16ka101-e: factory component page (tier=lcsc) · Ray 3h ago
pic24f16ka101-e-hero.glb pic24f16ka101-e: hero GLB from the etched model (keeps the MPN mark) · Ray 3h ago
pic24f16ka101-e-hero.overlay.json Publish 0.1.0 · Ray 3h ago
pic24f16ka101-e.glb Publish 0.1.0 · Ray 3h ago
pic24f16ka101-e.kicad_mod Publish 0.1.0 · Ray 3h ago
pic24f16ka101-e.kicad_sym Publish 0.1.0 · Ray 3h ago
pic24f16ka101-e.lbr Publish 0.1.0 · Ray 3h ago
pic24f16ka101-e.step Publish 0.1.0 · Ray 3h ago
README.md Publish 0.1.0 · Ray 3h ago

PIC24F16KA101-E

Microchip Tech · Microcontroller Units (MCUs/MPUs/SOCs) · VQFN-20(5x5)

PIC24F16KA101-E from Microchip Tech, in a VQFN-20(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 RB0 bidirectional PORTB digital I/O (Schmitt Trigger) multiplexed with AN2, C1IND, C2INB, CN4 and PGD1 ICSP/debugger data.
2 RB1 bidirectional PORTB digital I/O (Schmitt Trigger) multiplexed with AN3, C1INC, C2INA, CN5 and PGC1 ICSP/debugger clock.
3 RB2 bidirectional PORTB digital I/O (Schmitt Trigger) multiplexed with U1RX (UART1 receive) and CN6.
4 RA2 bidirectional PORTA digital I/O (Schmitt Trigger) multiplexed with OSCI/CLKI main oscillator or clock input, AN4, C1INB, C2IND and CN30.
5 RA3 bidirectional PORTA digital I/O (Schmitt Trigger) multiplexed with OSCO/CLKO main oscillator output or system clock output, AN5, C1INA, C2INC and CN29.
6 RB4 bidirectional PORTB digital I/O (Schmitt Trigger) multiplexed with SOSCI secondary oscillator input, U2BCLK, CN1 and PGD3 ICSP data.
7 RA4 bidirectional PORTA digital I/O (Schmitt Trigger) multiplexed with SOSCO secondary oscillator output, T1CK Timer1 clock, CN0 and PGC3 ICSP clock.
8 RB7 bidirectional PORTB digital I/O (Schmitt Trigger) multiplexed with INT0 external interrupt, U1TX (UART1 transmit) and CN23.
9 RB8 bidirectional PORTB digital I/O multiplexed with SCL1 (I2C1 clock), U1CTS (UART1 clear to send) and CN22.
10 RB9 bidirectional PORTB digital I/O multiplexed with SDA1 (I2C1 data), U1RTS (UART1 request to send), U1BCLK IrDA baud clock and CN21.
11 RA6 bidirectional PORTA digital I/O (Schmitt Trigger) multiplexed with C2OUT, CTED1, IC1, INT2, OC1 and CN8.
12 RB12 bidirectional PORTB digital I/O (Schmitt Trigger) multiplexed with AN12, HLVDIN, CTED2, SCK1 (SPI1 clock) and CN14.
13 RB13 bidirectional PORTB digital I/O (Schmitt Trigger) multiplexed with AN11, CTPLS CTMU pulse output, SDO1 (SPI1 data out) and CN13.
14 RB14 bidirectional PORTB digital I/O (Schmitt Trigger) multiplexed with AN10, C1OUT, CVREF, INT1, OCFA, RTCC alarm output, SDI1 (SPI1 data in) and CN12.
15 RB15 bidirectional PORTB digital I/O (Schmitt Trigger) multiplexed with REFO reference clock output, SS1 (SPI1 slave select), T2CK, T3CK and CN11.
16 VSS power_in Ground reference for logic and I/O pins.
17 VDD power_in Positive supply for peripheral digital logic and I/O pins.
18 MCLR input Master Clear (device Reset) Schmitt Trigger input, also VPP programming mode entry voltage, shared with RA5.
19 RA0 bidirectional PORTA digital I/O (Schmitt Trigger) multiplexed with AN0, VREF+ A/D and comparator high reference input, CN2 and PGC2 ICSP clock.
20 RA1 bidirectional PORTA digital I/O (Schmitt Trigger) multiplexed with AN1, VREF- A/D and comparator low reference input, CN3 and PGD2 ICSP data.
21 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package VQFN-20(5x5)
Category Single Chip Microcomputer/Microcontroller
Pins 21

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage VDD 1.8 3.6 V 218
RAM Data Retention Voltage VDR 1.5 V 218
VDD Start Voltage for POR VPOR 0.7 V VSS min 218
VDD Rise Rate for POR SVDD 0.05 V/ms 0-3.3V in 0.1s; 0-2.5V in 60 ms 218
Operating Ambient Temperature TA -40 125 °C Extended 217
Operating Junction Temperature TJ -40 175 °C 217
Voltage on VDD wrt VSS -0.3 5 V 215
Voltage on MCLR/VPP pin wrt VSS -0.3 9 V 215
Ambient temperature under bias -40 125 °C 215
Storage temperature -65 175 °C 215
Package Thermal Resistance, 20-Pin QFN θJA 43 °C/W Junction to ambient, by package simulation 217
Operating current 1 MIPS FOSC=2 MHz IDD 695 1500 µA 3.3V, +125°C max; typ at 3.3V 220
Operating current 16 MIPS FOSC=32 MHz IDD 11 18 mA 3.3V 220
Sleep base power-down current IPD 0.105 11 µA 3.3V, +125°C max 224
Deep Sleep base current IPD 0.035 5 µA 3.3V, +125°C max 224
I/O pins input low voltage VIL 0 0.2 V max is 0.2 VDD; min VSS 227
I/O pins input high voltage VIH 0.8 1 V min 0.8 VDD, max VDD 227
Output low voltage all I/O pins VOL 0.4 V IOL = 4.0 mA, VDD = 3.6V 228
Output high voltage all I/O pins VOH 3 V IOH = -3.0 mA, VDD = 3.6V 228
Input leakage current I/O ports IIL -0.1 0.05 0.1 µA VSS ≤ VPIN ≤ VDD, pin at high-impedance 227
CNx pull-up current ICNPU 50 250 500 µA VDD = 3.3V, VPIN = VSS 227
Internal band gap reference VBG 1.14 1.2 1.26 V 230
BOR voltage BOR=01 VBOR 2.92 3 3.08 V BOR = 01 219
BOR voltage BOR=10 VBOR 2.63 2.7 2.77 V BOR = 10 219
BOR voltage BOR=11 VBOR 1.75 1.82 1.85 V BOR = 11 219
Program flash cell endurance EP 10000 E/W 229
Data EEPROM cell endurance EPD 100000 E/W 229
FRC accuracy FRC -10 10 % -40°C ≤ TA ≤ +125°C 233
LPRC accuracy LPRC -30 30 % -40°C ≤ TA ≤ +125°C 233
Instruction cycle time TCY 62.5 ns 232
A/D throughput rate FCNV 500 ksps AVDD ≥ 2.7V 234
A/D integral nonlinearity INL 1 2 LSb VINL = AVSS = VREFL = 0V, AVDD = VREFH = 3V 235

CAD (KiCad official)

  • Symbol: PIC24F16KA101-E
  • Footprint: Package_DFN_QFN:QFN-20-1EP_5x5mm_P0.65mm_EP3.35x3.35mm
  • 3D model: VQFN-20(5x5) (KiCad packages3D, STEP)
  • 3D model files: pic24f16ka101-e-etched.step / pic24f16ka101-e-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pic24f16ka101-e.step / pic24f16ka101-e.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (278 pp, sha256 34d7f07e1f36cf3a, retrieved 2026-10-27, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF