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PIC24F08KL200-I
Public Made by Adomby adom
Microchip Tech Microcontroller Units (MCUs/MPUs/SOCs), TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownPIC24F08KL200-I
Microchip Tech · Microcontroller Units (MCUs/MPUs/SOCs) · TSSOP-14
PIC24F08KL200-I from Microchip Tech, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | MCLR/RA5 | input | Master Clear (device Reset) input, Schmitt Trigger, brought low to cause a Reset; also input-only PORTA pin RA5. |
| 2 | RA0/AN0/VREF+/CVREF+/PGEC2/CN2 | bidirectional | PORTA I/O RA0 with A/D analog input AN0, A/D reference voltage input (+) VREF+, comparator reference positive input CVREF+, ICSP clock 2 (PGEC2) and interrupt-on-change CN2. |
| 3 | RA1/AN1/VREF-/CVREF-/PGED2/ULPWU/CN3 | bidirectional | PORTA I/O RA1 with A/D analog input AN1, A/D reference voltage input (-) VREF-, comparator reference negative input CVREF-, ICSP data 2 (PGED2), ultra low-power wake-up input ULPWU and interrupt-on-change CN3. |
| 4 | RA2/OSCI/AN13/C1INB/CN30 | bidirectional | PORTA I/O RA2 with main oscillator input OSCI, A/D analog input AN13, Comparator 1 input B (-) and interrupt-on-change CN30. |
| 5 | RA3/OSCO/AN14/C1INA/CN29 | bidirectional | PORTA I/O RA3 with main oscillator output OSCO, A/D analog input AN14, Comparator 1 input A (+) and interrupt-on-change CN29. |
| 6 | RB4/AN15/PGED3/HLVDIN/CN1 | bidirectional | PORTB I/O RB4 with A/D analog input AN15, ICSP data 3 (PGED3), High/Low-Voltage Detect input HLVDIN and interrupt-on-change CN1. |
| 7 | RA4/PGEC3/CN0 | bidirectional | PORTA I/O RA4 with ICSP clock 3 (PGEC3) and interrupt-on-change CN0. |
| 8 | RB8/SCL1/SCK1/U1CTS/CN22 | bidirectional | PORTB I/O RB8 with MSSP1 I2C clock SCL1, MSSP1 SPI clock SCK1, UART1 clear-to-send input U1CTS and interrupt-on-change CN22. |
| 9 | RB9/SDA1/SDO1/T1CK/U1RTS/CCP2/CN21 | bidirectional | PORTB I/O RB9 with MSSP1 I2C data SDA1, MSSP1 SPI data output SDO1, Timer1 clock T1CK, UART1 request-to-send output U1RTS, CCP2 capture input/compare and PWM output, and interrupt-on-change CN21. |
| 10 | RA6/CCP1/INT2/CN8 | bidirectional | PORTA I/O RA6 with CCP1 capture input/compare and PWM output, external interrupt input INT2 and interrupt-on-change CN8. |
| 11 | RB14/AN10/C1OUT/CVREF/INT1/SDI1/CN12 | bidirectional | PORTB I/O RB14 with A/D analog input AN10, Comparator 1 output, comparator voltage reference output CVREF, external interrupt input INT1, MSSP1 SPI data input SDI1 and interrupt-on-change CN12. |
| 12 | RB15/AN9/REFO/INT0/T3CK/CN11 | bidirectional | PORTB I/O RB15 with A/D analog input AN9, reference clock output REFO, external interrupt input INT0, Timer3 clock T3CK and interrupt-on-change CN11. |
| 13 | VSS/AVSS | power_in | Ground reference for logic and I/O pins and for analog modules; must always be connected. |
| 14 | VDD/AVDD | power_in | Positive supply for peripheral digital logic, I/O pins and analog modules (operating range 1.8V to 3.6V); must always be connected. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | TSSOP-14 |
| Category | Single Chip Microcomputer/Microcontroller |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VDD | 1.8 | 3.6 | V | 199 | ||
| RAM Data Retention Voltage | VDR | 1.5 | V | 199 | |||
| VDD Start Voltage to Ensure Internal Power-on Reset | VPOR | 0.7 | V | 199 | |||
| VDD Rise Rate to Ensure Internal Power-on Reset | SVDD | 0.05 | V/ms | 0-3.3V in 0.1s; 0-2.5V in 60 ms | 199 | ||
| Band Gap Voltage Reference | VBG | 1.14 | 1.2 | 1.26 | V | 199 | |
| Operating Junction Temperature Range | TJ | -40 | 140 | °C | 199 | ||
| Operating Ambient Temperature Range (Industrial) | TA | -40 | 85 | °C | Industrial | 199 | |
| Package Thermal Resistance, 14-Pin TSSOP | θJA | 108 | °C/W | Simulation | 199 | ||
| Voltage on VDD with respect to VSS | -0.3 | 4.5 | V | 197 | |||
| Voltage on MCLR/VPP pin | -0.3 | 9 | V | 197 | |||
| Storage temperature | -65 | 150 | °C | 197 | |||
| Ambient temperature under bias | -40 | 125 | °C | 197 | |||
| Operating Current | IDD | 0.154 | 0.35 | mA | 1.8V +85°C, 0.5 MIPS, FOSC = 1 MHz | 201 | |
| Operating Current | IDD | 7.76 | 12 | mA | 3.3V +85°C, 16 MIPS, FOSC = 32 MHz | 201 | |
| Idle Current | IIDLE | 2.52 | 3.2 | mA | 3.3V +85°C, 16 MIPS, FOSC = 32 MHz | 201 | |
| Sleep Power-Down Current | IPD | 0.2 | 1.35 | µA | 1.8V +85°C, Sleep mode | 202 | |
| Sleep Power-Down Current | IPD | 0.25 | 2.45 | µA | 3.3V +85°C, Sleep mode | 202 | |
| Watchdog Timer Current | IPD | 0.45 | 0.95 | µA | 3.3V +85°C | 203 | |
| HLVD Voltage on VDD Transition, HLVDL=1110 | VHLVD | 3.22 | 3.39 | 3.56 | V | HLVDL[3:0] = 1110 | 200 |
| BOR Voltage on VDD Transition, BORV=01 | BOR | 2.9 | 3 | 3.38 | V | BORV = 01 | 200 |
| BOR Voltage on VDD Transition, BORV=10 | BOR | 2.53 | 2.7 | 3.07 | V | BORV = 10 | 200 |
| BOR Voltage on VDD Transition, BORV=11 | BOR | 1.75 | 1.85 | 2.05 | V | BORV = 11 | 200 |
| BOR Voltage on VDD Transition, BORV=00 | BOR | 1.85 | 2 | 2.15 | V | BORV = 00 | 200 |
| Input Low Voltage, I/O Pins | VIL | 0 | 0.2 | V | VSS to 0.2 VDD | 204 | |
| Input High Voltage, I/O Pins | VIH | 0.8 | 1 | V | 0.8 VDD to VDD | 204 | |
| CNx Pull-up Current | ICNPU | 50 | 250 | 500 | µA | VDD = 3.3V, VPIN = VSS | 204 |
| Input Leakage Current, I/O Ports | IIL | -0.1 | 0.05 | 0.1 | µA | VSS ≤ VPIN ≤ VDD, Pin at high-impedance | 204 |
| Output Low Voltage, All I/O Pins | VOL | 0.4 | V | IOL = 4.0 mA VDD = 3.6V | 205 | ||
| Output High Voltage, All I/O Pins | VOH | 3 | V | IOH = -3.0 mA VDD = 3.6V | 205 | ||
| Flash Cell Endurance | EP | 10000 | E/W | 205 | |||
| Flash Characteristic Retention | TRETD | 40 | Year | Provided no other specifications are violated | 205 | ||
| Comparator Input Offset Voltage | VIOFF | 20 | 40 | mV | 206 | ||
| Comparator Common-Mode Rejection Ratio | CMRR | 55 | dB | 206 | |||
| FRC Accuracy @ 8 MHz | -5 | 5 | % | -40°C ≤ TA ≤ +85°C 1.8V ≤ VDD ≤ 3.6V | 209 | ||
| LPRC Accuracy @ 31 kHz | -15 | 15 | % | -40°C ≤ TA ≤ +85°C 1.8V ≤ VDD ≤ 3.6V | 209 | ||
| Power-up Timer Period | TPWRT | 50 | 64 | 90 | ms | 211 | |
| A/D Resolution | NR | 10 | bits | 221 | |||
| A/D Integral Nonlinearity | INL | 1 | 2 | LSb | VINL = AVSS = VREFL = 0V, AVDD = VREFH = 3V | 221 |
CAD (KiCad official)
- Symbol:
PIC24F08KL200-I - Footprint:
Package_SO:TSSOP-14_4.4x5mm_P0.65mm - 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files:
pic24f08kl200-i-etched.step/pic24f08kl200-i-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pic24f08kl200-i.step/pic24f08kl200-i.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (264 pp, sha256
277a1080d9cd50d6, retrieved 2026-10-23, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).