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PIC24EP512GU810-I

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Microchip Tech MICROCHIP, TQFP-100(14x14). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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PIC24EP512GU810-I

Microchip Tech · MICROCHIP · TQFP-100(14x14)

PIC24EP512GU810-I from Microchip Tech, in a TQFP-100(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 RP127/RG15 bidirectional PORTG I/O RG15 with remappable pin RP127; Schmitt Trigger input, up to 5V tolerant.
2 VDD power_in Positive supply for peripheral logic and I/O pins; must always be connected.
3 AN29/PMD5/RP85/RE5 bidirectional PORTE I/O RE5 with analog input AN29, PMP data bit 5 and remappable RP85.
4 AN30/PMD6/RPI86/RE6 bidirectional PORTE I/O RE6 with analog input AN30, PMP data bit 6 and remappable input RPI86.
5 AN31/PMD7/RP87/RE7 bidirectional PORTE I/O RE7 with analog input AN31, PMP data bit 7 and remappable RP87.
6 AN16/RPI49/RC1 bidirectional PORTC I/O RC1 with analog input AN16 and remappable input RPI49.
7 AN17/RPI50/RC2 bidirectional PORTC I/O RC2 with analog input AN17 and remappable input RPI50.
8 AN18/RPI51/RC3 bidirectional PORTC I/O RC3 with analog input AN18 and remappable input RPI51.
9 AN19/RPI52/RC4 bidirectional PORTC I/O RC4 with analog input AN19 and remappable input RPI52.
10 C1IN3-/SCK2/PMA5/RP118/RG6 bidirectional PORTG I/O RG6 with comparator 1 input C1IN3-, SPI2 clock SCK2, PMP address bit 5 and remappable RP118.
11 C1IN1-/SDI2/PMA4/RPI119/RG7 bidirectional PORTG I/O RG7 with comparator 1 input C1IN1-, SPI2 data in SDI2, PMP address bit 4 and remappable input RPI119.
12 C2IN3-/SDO2/PMA3/RP120/RG8 bidirectional PORTG I/O RG8 with comparator 2 input C2IN3-, SPI2 data out SDO2, PMP address bit 3 and remappable RP120.
13 MCLR input Master Clear active-low Reset input; also used for device programming and debugging.
14 C2IN1-/PMA2/RPI121/RG9 bidirectional PORTG I/O RG9 with comparator 2 input C2IN1-, PMP address bit 2 and remappable input RPI121.
15 VSS power_in Ground reference for logic and I/O pins.
16 VDD power_in Positive supply for peripheral logic and I/O pins; must always be connected.
17 TMS/RPI16/RA0 bidirectional PORTA I/O RA0 with JTAG test mode select TMS and remappable input RPI16.
18 AN20/RPI88/RE8 bidirectional PORTE I/O RE8 with analog input AN20 and remappable input RPI88.
19 AN21/RPI89/RE9 bidirectional PORTE I/O RE9 with analog input AN21 and remappable input RPI89.
20 AN5/C1IN1+/VBUSON/VBUSST/RPI37/RB5 bidirectional PORTB I/O RB5 with analog input AN5, comparator 1 input C1IN1+, USB VBUSON/VBUSST and remappable input RPI37.
21 AN4/C1IN2-/USBOEN/RPI36/RB4 bidirectional PORTB I/O RB4 with analog input AN4, comparator 1 input C1IN2-, USBOEN and remappable input RPI36.
22 AN3/C2IN1+/VPIO/RPI35/RB3 bidirectional PORTB I/O RB3 with analog input AN3, comparator 2 input C2IN1+, USB VPIO and remappable input RPI35.
23 AN2/C2IN2-/VMIO/RPI34/RB2 bidirectional PORTB I/O RB2 with analog input AN2, comparator 2 input C2IN2-, USB VMIO and remappable input RPI34.
24 PGEC3/AN1/RPI33/RB1 bidirectional PORTB I/O RB1 with programming/debugging clock PGEC3, analog input AN1 and remappable input RPI33.
25 PGED3/AN0/RPI32/RB0 bidirectional PORTB I/O RB0 with programming/debugging data PGED3, analog input AN0 and remappable input RPI32.
26 PGEC1/AN6/RPI38/RB6 bidirectional PORTB I/O RB6 with programming/debugging clock PGEC1, analog input AN6 and remappable input RPI38.
27 PGED1/AN7/RCV/RPI39/RB7 bidirectional PORTB I/O RB7 with programming/debugging data PGED1, analog input AN7, USB RCV and remappable input RPI39.
28 VREF-/RA9 power_in Analog voltage reference (low) input, shared with PORTA pin RA9.
29 VREF+/RA10 power_in Analog voltage reference (high) input, shared with PORTA pin RA10.
30 AVDD power_in Positive supply for analog modules; must be connected at all times and within 300 mV of VDD.
31 AVSS power_in Ground reference for analog modules.
32 AN8/PMA6/RPI40/RB8 bidirectional PORTB I/O RB8 with analog input AN8, PMP address bit 6 and remappable input RPI40.
33 AN9/PMA7/RPI41/RB9 bidirectional PORTB I/O RB9 with analog input AN9, PMP address bit 7 and remappable input RPI41.
34 AN10/CVREF/PMA13/RPI42/RB10 bidirectional PORTB I/O RB10 with analog input AN10, comparator voltage reference output CVREF, PMP address bit 13 and remappable input RPI42.
35 AN11/PMA12/RPI43/RB11 bidirectional PORTB I/O RB11 with analog input AN11, PMP address bit 12 and remappable input RPI43.
36 VSS power_in Ground reference for logic and I/O pins.
37 VDD power_in Positive supply for peripheral logic and I/O pins; must always be connected.
38 TCK/RPI17/RA1 bidirectional PORTA I/O RA1 with JTAG test clock input TCK and remappable input RPI17.
39 RP109/RF13 bidirectional PORTF I/O RF13 with remappable pin RP109.
40 RP108/RF12 bidirectional PORTF I/O RF12 with remappable pin RP108.
41 AN12/PMA11/RPI44/RB12 bidirectional PORTB I/O RB12 with analog input AN12, PMP address bit 11 and remappable input RPI44.
42 AN13/PMA10/RPI45/RB13 bidirectional PORTB I/O RB13 with analog input AN13, PMP address bit 10 and remappable input RPI45.
43 AN14/PMA1/RPI46/RB14 bidirectional PORTB I/O RB14 with analog input AN14, PMP address bit 1 and remappable input RPI46.
44 AN15/PMA0/RPI47/RB15 bidirectional PORTB I/O RB15 with analog input AN15, PMP address bit 0 and remappable input RPI47.
45 VSS power_in Ground reference for logic and I/O pins.
46 VDD power_in Positive supply for peripheral logic and I/O pins; must always be connected.
47 RPI78/RD14 bidirectional PORTD I/O RD14 with remappable input RPI78.
48 RP79/RD15 bidirectional PORTD I/O RD15 with remappable pin RP79.
49 SDA2/PMA9/RP100/RF4 bidirectional PORTF I/O RF4 with I2C2 data SDA2, PMP address bit 9 and remappable RP100.
50 SCL2/PMA8/RP101/RF5 bidirectional PORTF I/O RF5 with I2C2 clock SCL2, PMP address bit 8 and remappable RP101.
51 USBID/RP99/RF3 bidirectional PORTF I/O RF3 with USB OTG ID detect input and remappable RP99.
52 RP98/RF2 bidirectional PORTF I/O RF2 with remappable pin RP98.
53 RP104/RF8 bidirectional PORTF I/O RF8 with remappable pin RP104.
54 VBUS power_in USB bus power monitor analog input, up to 5V tolerant.
55 VUSB3V3 power_in USB internal transceiver supply; must be connected to VDD if the USB module is not used.
56 D-/RG3 bidirectional D- pin of the internal USB transceiver, shared with input-only RG3.
57 D+/RG2 bidirectional D+ pin of the internal USB transceiver, shared with input-only RG2.
58 ASCL2/RPI18/RA2 bidirectional PORTA I/O RA2 with alternate I2C2 clock ASCL2 and remappable input RPI18.
59 ASDA2/RPI19/RA3 bidirectional PORTA I/O RA3 with alternate I2C2 data ASDA2 and remappable input RPI19.
60 TDI/RPI20/RA4 bidirectional PORTA I/O RA4 with JTAG test data input TDI and remappable input RPI20.
61 TDO/RPI21/RA5 bidirectional PORTA I/O RA5 with JTAG test data output TDO and remappable input RPI21.
62 VDD power_in Positive supply for peripheral logic and I/O pins; must always be connected.
63 OSC1/RPI60/RC12 bidirectional Oscillator crystal/external clock input OSC1, shared with RC12 and remappable input RPI60.
64 OSC2/CLKO/RC15 bidirectional Oscillator crystal output OSC2 or CLKO in RC and EC modes, shared with RC15.
65 VSS power_in Ground reference for logic and I/O pins.
66 RPI30/RA14 bidirectional PORTA I/O RA14 with remappable input RPI30.
67 RPI31/RA15 bidirectional PORTA I/O RA15 with remappable input RPI31.
68 RTCC/DMLN/RPI72/RD8 bidirectional PORTD I/O RD8 with RTCC alarm output, USB D- external pull-down control DMLN and remappable input RPI72.
69 ASDA1/DPLN/RPI73/RD9 bidirectional PORTD I/O RD9 with alternate I2C1 data ASDA1, USB D+ external pull-down control DPLN and remappable input RPI73.
70 ASCL1/PMCS2/RPI74/RD10 bidirectional PORTD I/O RD10 with alternate I2C1 clock ASCL1, PMP chip select 2 and remappable input RPI74.
71 PMCS1/RPI75/RD11 bidirectional PORTD I/O RD11 with PMP chip select 1 and remappable input RPI75.
72 INT0/DMH/RP64/RD0 bidirectional PORTD I/O RD0 with external interrupt 0, USB D- external pull-up control DMH and remappable RP64.
73 PGED2/SOSCI/C3IN3-/RPI61/RC13 bidirectional PORTC I/O RC13 with programming data PGED2, 32.768 kHz oscillator input SOSCI, comparator 3 input C3IN3- and remappable input RPI61.
74 PGEC2/SOSCO/C3IN1-/T1CK/RPI62/RC14 bidirectional PORTC I/O RC14 with programming clock PGEC2, 32.768 kHz oscillator output SOSCO, comparator 3 input C3IN1-, Timer1 clock T1CK and remappable input RPI62.
75 VSS power_in Ground reference for logic and I/O pins.
76 VCPCON/RP65/RD1 bidirectional PORTD I/O RD1 with USB boost controller PWM signal VCPCON and remappable RP65.
77 DPH/RP66/RD2 bidirectional PORTD I/O RD2 with USB D+ external pull-up control DPH and remappable RP66.
78 PMBE/RP67/RD3 bidirectional PORTD I/O RD3 with PMP byte enable strobe and remappable RP67.
79 RPI76/RD12 bidirectional PORTD I/O RD12 with remappable input RPI76.
80 RPI77/RD13 bidirectional PORTD I/O RD13 with remappable input RPI77.
81 PMWR/RP68/RD4 bidirectional PORTD I/O RD4 with PMP write strobe and remappable RP68.
82 PMRD/RP69/RD5 bidirectional PORTD I/O RD5 with PMP read strobe and remappable RP69.
83 C3IN2-/RP70/RD6 bidirectional PORTD I/O RD6 with comparator 3 input C3IN2- and remappable RP70.
84 C3IN1+/VCMPST3/RP71/RD7 bidirectional PORTD I/O RD7 with comparator 3 input C3IN1+, USB external comparator 3 input VCMPST3 and remappable RP71.
85 VCAP passive CPU logic filter capacitor connection; requires a low-ESR (<1 Ohm) capacitor of at least 4.7 µF (10 µF recommended) to ground and must not be connected to VDD.
86 VDD power_in Positive supply for peripheral logic and I/O pins; must always be connected.
87 VCMPST1/RP96/RF0 bidirectional PORTF I/O RF0 with USB external comparator 1 input VCMPST1 and remappable RP96.
88 VCMPST2/RP97/RF1 bidirectional PORTF I/O RF1 with USB external comparator 2 input VCMPST2 and remappable RP97.
89 RP113/RG1 bidirectional PORTG I/O RG1 with remappable pin RP113.
90 RP112/RG0 bidirectional PORTG I/O RG0 with remappable pin RP112.
91 AN22/RPI22/RA6 bidirectional PORTA I/O RA6 with analog input AN22 and remappable input RPI22.
92 AN23/RPI23/RA7 bidirectional PORTA I/O RA7 with analog input AN23 and remappable input RPI23.
93 AN24/PMD0/RP80/RE0 bidirectional PORTE I/O RE0 with analog input AN24, PMP data bit 0 and remappable RP80.
94 AN25/PMD1/RPI81/RE1 bidirectional PORTE I/O RE1 with analog input AN25, PMP data bit 1 and remappable input RPI81.
95 RP126/RG14 bidirectional PORTG I/O RG14 with remappable pin RP126.
96 RPI124/RG12 bidirectional PORTG I/O RG12 with remappable input RPI124.
97 RP125/RG13 bidirectional PORTG I/O RG13 with remappable pin RP125.
98 AN26/PMD2/RP82/RE2 bidirectional PORTE I/O RE2 with analog input AN26, PMP data bit 2 and remappable RP82.
99 AN27/PMD3/RPI83/RE3 bidirectional PORTE I/O RE3 with analog input AN27, PMP data bit 3 and remappable input RPI83.
100 AN28/PMD4/RP84/RE4 bidirectional PORTE I/O RE4 with analog input AN28, PMP data bit 4 and remappable RP84.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package TQFP-100(14x14)
Category Embedded Processors & Controllers
Pins 100

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Operating Junction Temperature Range (Industrial) TJ -40 125 °C Industrial Temperature Devices 500
Operating Ambient Temperature Range (Industrial) TA -40 85 °C Industrial Temperature Devices 500
Operating VDD range (Table 32-1) VDD 2.95 3.6 V Table 32-1; device functional at VBORMIN < VDD < VDDMIN, analog modules degraded 500
Operating VDD range (features) VDD 3 3.6 V -40°C to +85°C, DC to 70 MIPS 1
Maximum MIPS at -40°C to +85°C 70 MIPS VDD 2.95V-3.6V, -40°C to +85°C 500
Package Thermal Resistance, 100-pin TQFP (14x14 mm) θJA 43 °C/W Junction to ambient, by package simulation 500
Dynamic current 1 mA/MHz Typical, per front page 1
IPD current IPD 60 µA Typical, per front page 1

CAD (KiCad official)

  • Symbol: PIC24EP512GU810-I
  • Footprint: Package_QFP:TQFP-100_14x14mm_P0.5mm
  • 3D model: TQFP-100(14x14) (KiCad packages3D, STEP)
  • 3D model files: pic24ep512gu810-i-etched.step / pic24ep512gu810-i-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pic24ep512gu810-i.step / pic24ep512gu810-i.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (622 pp, sha256 ae39e57dafa6acab, retrieved 2026-10-27, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF