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PIC18F4620-I

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Microchip Tech Microcontrollers (MCU/MPU/SOC), TQFP-44(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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PIC18F4620-I

Microchip Tech · Microcontrollers (MCU/MPU/SOC) · TQFP-44(10x10)

PIC18F4620-I from Microchip Tech, in a TQFP-44(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 RC7/RX/DT bidirectional Digital I/O with Schmitt Trigger input; EUSART asynchronous receive (RX) or synchronous data (DT).
2 RD4/PSP4 bidirectional Digital I/O with Schmitt Trigger input; Parallel Slave Port data bit 4 (TTL inputs when PSP is enabled).
3 RD5/PSP5/P1B bidirectional Digital I/O; also Parallel Slave Port data bit 5 or Enhanced CCP1 PWM output channel B (takes priority over port and PSP data).
4 RD6/PSP6/P1C bidirectional Digital I/O; also Parallel Slave Port data bit 6 or Enhanced CCP1 PWM output channel C (takes priority over port and PSP data).
5 RD7/PSP7/P1D bidirectional Digital I/O; also Parallel Slave Port data bit 7 or Enhanced CCP1 PWM output channel D (takes priority over port and PSP data).
6 VSS power_in Ground reference for logic and I/O pins.
7 VDD power_in Positive supply for logic and I/O pins.
8 RB0/INT0/FLT0/AN12 bidirectional Digital I/O with weak pull-up when RBPU is cleared; external interrupt 0, Enhanced PWM fault input (ECCP1), and analog input 12.
9 RB1/INT1/AN10 bidirectional Digital I/O with weak pull-up when RBPU is cleared; external interrupt 1 and analog input 10.
10 RB2/INT2/AN8 bidirectional Digital I/O with weak pull-up when RBPU is cleared; external interrupt 2 and analog input 8.
11 RB3/AN9/CCP2 bidirectional Digital I/O with weak pull-up when RBPU is cleared; analog input 9 and alternate CCP2 capture/compare/PWM pin when CCP2MX is cleared.
12 NC unconnected No connect.
13 NC unconnected No connect.
14 RB4/KBI0/AN11 bidirectional Digital I/O with weak pull-up when RBPU is cleared; interrupt-on-change pin and analog input 11.
15 RB5/KBI1/PGM bidirectional Digital I/O with weak pull-up when RBPU is cleared; interrupt-on-change pin and low-voltage ICSP programming enable pin.
16 RB6/KBI2/PGC bidirectional Digital I/O with weak pull-up when RBPU is cleared; interrupt-on-change pin and in-circuit debugger/ICSP programming clock pin.
17 RB7/KBI3/PGD bidirectional Digital I/O with weak pull-up when RBPU is cleared; interrupt-on-change pin and in-circuit debugger/ICSP programming data pin.
18 MCLR/VPP/RE3 input Active-low Master Clear (Reset) input when MCLRE is set; programming voltage (VPP) detect input; RE3 digital input when MCLR functionality is disabled.
19 RA0/AN0 bidirectional Digital I/O (TTL); analog input 0 and comparator C1- input.
20 RA1/AN1 bidirectional Digital I/O (TTL); analog input 1 and comparator C2- input.
21 RA2/AN2/VREF-/CVREF bidirectional Digital I/O (TTL); analog input 2, A/D reference voltage (low) input VREF-, and comparator voltage reference output CVREF.
22 RA3/AN3/VREF+ bidirectional Digital I/O (TTL); analog input 3 and A/D reference voltage (high) input VREF+.
23 RA4/T0CKI/C1OUT bidirectional Digital I/O with Schmitt Trigger input; Timer0 external clock input (T0CKI) or Comparator 1 output (C1OUT).
24 RA5/AN4/SS/HLVDIN/C2OUT bidirectional Digital I/O (TTL); analog input 4, SPI slave select input (SS), high/low-voltage detect input (HLVDIN), or Comparator 2 output (C2OUT).
25 RE0/RD/AN5 bidirectional Digital I/O with Schmitt Trigger input; Parallel Slave Port read control input (RD) when PSP is enabled, or analog input 5.
26 RE1/WR/AN6 bidirectional Digital I/O with Schmitt Trigger input; Parallel Slave Port write control input (WR) when PSP is enabled, or analog input 6.
27 RE2/CS/AN7 bidirectional Digital I/O with Schmitt Trigger input; Parallel Slave Port chip select input (CS) when PSP is enabled, or analog input 7.
28 VDD power_in Positive supply for logic and I/O pins.
29 VSS power_in Ground reference for logic and I/O pins.
30 OSC1/CLKI/RA7 input Oscillator crystal or external clock input (OSC1/CLKI); becomes digital I/O RA7 in external-oscillator-disabled modes.
31 OSC2/CLKO/RA6 bidirectional Oscillator crystal output or FOSC/4 clock output (CLKO) in RC/EC modes; becomes digital I/O RA6 in RCIO, INTIO2 and ECIO modes.
32 RC0/T1OSO/T13CKI bidirectional Digital I/O with Schmitt Trigger input; Timer1 oscillator output (T1OSO) or Timer1/Timer3 external clock input (T13CKI).
33 NC unconnected No connect.
34 NC unconnected No connect.
35 RC1/T1OSI/CCP2 bidirectional Digital I/O with Schmitt Trigger input; Timer1 oscillator input (T1OSI) or CCP2 capture/compare/PWM pin (default assignment when CCP2MX is set).
36 RC2/CCP1/P1A bidirectional Digital I/O with Schmitt Trigger input; CCP1 capture/compare/PWM pin or Enhanced CCP1 PWM output channel A (P1A).
37 RC3/SCK/SCL bidirectional Digital I/O with Schmitt Trigger input; MSSP synchronous serial clock for SPI (SCK) or I2C (SCL) mode.
38 RD0/PSP0 bidirectional Digital I/O with Schmitt Trigger input; Parallel Slave Port data bit 0 (TTL inputs when PSP is enabled).
39 RD1/PSP1 bidirectional Digital I/O with Schmitt Trigger input; Parallel Slave Port data bit 1 (TTL inputs when PSP is enabled).
40 RD2/PSP2 bidirectional Digital I/O with Schmitt Trigger input; Parallel Slave Port data bit 2 (TTL inputs when PSP is enabled).
41 RD3/PSP3 bidirectional Digital I/O with Schmitt Trigger input; Parallel Slave Port data bit 3 (TTL inputs when PSP is enabled).
42 RC4/SDI/SDA bidirectional Digital I/O with Schmitt Trigger input; MSSP SPI data input (SDI) or I2C data I/O (SDA).
43 RC5/SDO bidirectional Digital I/O with Schmitt Trigger input; MSSP SPI data output (SDO).
44 RC6/TX/CK bidirectional Digital I/O with Schmitt Trigger input; EUSART asynchronous transmit (TX) or synchronous clock (CK).

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package TQFP-44(10x10)
Category Embedded Processors & Controllers
Pins 44

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage (standard F device) VDD 4.2 5.5 V Standard Enhanced Flash 'F' devices; LF parts have 2.0V to 5.5V 10
Operating frequency 40 MHz Printed as DC, 40 MHz (Table 1-1) 9
HS oscillator input frequency in HSPLL mode 10 MHz HS oscillator feeding PLL (x4) in HSPLL mode 26
PLL output frequency with internal oscillator 32 MHz PLL enabled in INTOSC modes; PLL works only at 4 MHz or 8 MHz INTOSC output 28
RC oscillator external resistor REXT REXT 3 100 kΩ External RC oscillator mode, recommended values 27
RC oscillator external capacitor CEXT CEXT 20 pF External RC oscillator mode, recommended CEXT > 20 pF 27
MCLR pull-up resistor to VDD 1 10 kΩ MCLR tied to VDD through resistor for Power-on Reset (recommended) 43
Maximum recommended analog source impedance 2.5 kΩ A/D conversion, maximum recommended impedance for analog sources 230
Maximum device frequency, A/D clock 2 TOSC ADCS2:ADCS0 2.86 MHz PIC18F2X20/4X20, TAD = 2 TOSC, ADCS2:ADCS0 = 000 231
Maximum device frequency, A/D clock 4 TOSC ADCS2:ADCS0 5.71 MHz PIC18F2X20/4X20, TAD = 4 TOSC, ADCS2:ADCS0 = 100 231
Maximum device frequency, A/D clock 8 TOSC ADCS2:ADCS0 11.43 MHz PIC18F2X20/4X20, TAD = 8 TOSC, ADCS2:ADCS0 = 001 231
Maximum device frequency, A/D clock 16 TOSC ADCS2:ADCS0 22.86 MHz PIC18F2X20/4X20, TAD = 16 TOSC, ADCS2:ADCS0 = 101 231
Maximum device frequency, A/D clock 32 TOSC ADCS2:ADCS0 40 MHz PIC18F2X20/4X20, TAD = 32 TOSC, ADCS2:ADCS0 = 010 231
Maximum device frequency, A/D clock 64 TOSC ADCS2:ADCS0 40 MHz PIC18F2X20/4X20, TAD = 64 TOSC, ADCS2:ADCS0 = 110 231

CAD (KiCad official)

  • Symbol: PIC18F4620-I
  • Footprint: Package_QFP:TQFP-44_10x10mm_P0.8mm
  • 3D model: TQFP-44(10x10) (KiCad packages3D, STEP)
  • 3D model files: pic18f4620-i-etched.step / pic18f4620-i-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pic18f4620-i.step / pic18f4620-i.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (390 pp, sha256 4692e51177e0a8bb, retrieved 2026-10-20, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF