component

PIC18F45K22-I

Public Made by Adom

by adom

Microchip Tech Microcontrollers (MCU/MPU/SOC), TQFP-44(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentembedded processors & controllerspic18f45k22-ifactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 8d ago
viewers pic18f45k22-i: viewers · Ray 8d ago
package.json Publish 0.1.0 · Ray 8d ago
page.json Set visibility: public · Ray 8d ago
pic18f45k22-i-etched.glb Publish 0.1.0 · Ray 8d ago
pic18f45k22-i-etched.step pic18f45k22-i: factory component page (tier=lcsc) · Ray 8d ago
pic18f45k22-i-hero.glb pic18f45k22-i: hero GLB from the etched model (keeps the MPN mark) · Ray 8d ago
pic18f45k22-i-hero.overlay.json Publish 0.1.0 · Ray 8d ago
pic18f45k22-i.glb Publish 0.1.0 · Ray 8d ago
pic18f45k22-i.kicad_mod Publish 0.1.0 · Ray 8d ago
pic18f45k22-i.kicad_sym Publish 0.1.0 · Ray 8d ago
pic18f45k22-i.lbr Publish 0.1.0 · Ray 8d ago
pic18f45k22-i.step Publish 0.1.0 · Ray 8d ago
README.md Publish 0.1.0 · Ray 8d ago

PIC18F45K22-I

Microchip Tech · Microcontrollers (MCU/MPU/SOC) · TQFP-44(10x10)

PIC18F45K22-I from Microchip Tech, in a TQFP-44(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 RC7/RX1/DT1/AN19 bidirectional Digital I/O with Schmitt Trigger input, also EUSART1 asynchronous receive (RX1) and synchronous data (DT1), and analog input AN19.
2 RD4/P2D/SDO2/AN24 bidirectional Digital I/O with Schmitt Trigger input, also Enhanced CCP2 PWM output P2D, MSSP2 SPI data out (SDO2), and analog input AN24.
3 RD5/P1B/AN25 bidirectional Digital I/O with Schmitt Trigger input, also Enhanced CCP1 PWM output P1B and analog input AN25.
4 RD6/P1C/TX2/CK2/AN26 bidirectional Digital I/O with Schmitt Trigger input, also Enhanced CCP1 PWM output P1C, EUSART2 asynchronous transmit (TX2), synchronous clock (CK2), and analog input AN26.
5 RD7/P1D/RX2/DT2/AN27 bidirectional Digital I/O with Schmitt Trigger input, also Enhanced CCP1 PWM output P1D, EUSART2 receive (RX2) and synchronous data (DT2), and analog input AN27.
6 VSS power_in Ground reference for logic and I/O pins.
7 VDD power_in Positive supply for logic and I/O pins.
8 RB0/INT0/FLT0/SRI/AN12 bidirectional Digital I/O with TTL input, also external interrupt INT0, ECCP PWM Fault input FLT0 for auto-shutdown, SR latch input SRI, and analog input AN12.
9 RB1/INT1/C12IN3-/AN10 bidirectional Digital I/O with TTL input, also external interrupt INT1, comparator C1/C2 inverting input C12IN3-, and analog input AN10.
10 RB2/INT2/CTED1/AN8 bidirectional Digital I/O with TTL input, also external interrupt INT2, CTMU Edge 1 input CTED1, and analog input AN8.
11 RB3/CTED2/P2A/CCP2/C12IN2-/AN9 bidirectional Digital I/O with TTL input, also CTMU Edge 2 input CTED2, Enhanced CCP2 PWM output P2A, CCP2 capture/compare/PWM, comparator C1/C2 inverting input C12IN2-, and analog input AN9.
12 NC unconnected No connect; not internally connected.
13 NC unconnected No connect; not internally connected.
14 RB4/IOC0/T5G/AN11 bidirectional Digital I/O with TTL input, also interrupt-on-change pin IOC0, Timer5 external clock gate input T5G, and analog input AN11.
15 RB5/IOC1/P3A/CCP3/T3CKI/T1G/AN13 bidirectional Digital I/O with TTL input, also interrupt-on-change pin IOC1, Enhanced CCP3 PWM output P3A, CCP3 capture/compare/PWM, Timer3 clock input T3CKI, Timer1 external clock gate input T1G, and analog input AN13.
16 RB6/IOC2/PGC bidirectional Digital I/O with TTL input, also interrupt-on-change pin IOC2 and In-Circuit Debugger/ICSP programming clock PGC (Schmitt Trigger input).
17 RB7/IOC3/PGD bidirectional Digital I/O with TTL input, also interrupt-on-change pin IOC3 and In-Circuit Debugger/ICSP programming data PGD.
18 RE3/VPP/MCLR input Input-only pin: digital input when MCLRE configuration bit is 0; otherwise active-low Master Clear (device Reset) input MCLR, and programming voltage input VPP.
19 RA0/C12IN0-/AN0 bidirectional Digital I/O with TTL input, also comparator C1/C2 inverting input C12IN0- and analog input AN0.
20 RA1/C12IN1-/AN1 bidirectional Digital I/O with TTL input, also comparator C1/C2 inverting input C12IN1- and analog input AN1.
21 RA2/C2IN+/AN2/DACOUT/VREF- bidirectional Digital I/O with TTL input, also comparator C2 non-inverting input C2IN+, analog input AN2, DAC reference output DACOUT, and A/D reference voltage (low) input VREF-.
22 RA3/C1IN+/AN3/VREF+ bidirectional Digital I/O with TTL input, also comparator C1 non-inverting input C1IN+, analog input AN3, and A/D reference voltage (high) input VREF+.
23 RA4/C1OUT/SRQ/T0CKI bidirectional Digital I/O with Schmitt Trigger input, also comparator C1 output C1OUT, SR latch Q output SRQ, and Timer0 external clock input T0CKI.
24 RA5/C2OUT/SRNQ/SS1/HLVDIN/AN4 bidirectional Digital I/O with TTL input, also comparator C2 output C2OUT, SR latch output SRNQ, MSSP1 SPI slave select SS1, high/low-voltage detect input HLVDIN, and analog input AN4.
25 RE0/P3A/CCP3/AN5 bidirectional Digital I/O with Schmitt Trigger input, also Enhanced CCP3 PWM output P3A, CCP3 capture/compare/PWM, and analog input AN5; reads as 0 when selected as analog input.
26 RE1/P3B/AN6 bidirectional Digital I/O with Schmitt Trigger input, also Enhanced CCP3 PWM output P3B and analog input AN6; reads as 0 when selected as analog input.
27 RE2/CCP5/AN7 bidirectional Digital I/O with Schmitt Trigger input, also CCP5 capture/compare/PWM and analog input AN7; reads as 0 when selected as analog input.
28 VDD power_in Positive supply for logic and I/O pins.
29 VSS power_in Ground reference for logic and I/O pins.
30 RA7/CLKI/OSC1 bidirectional Digital I/O with TTL input, disabled in external oscillator modes; alternately external clock input CLKI or oscillator crystal input OSC1 (Schmitt Trigger in RC mode, CMOS otherwise).
31 RA6/CLKO/OSC2 bidirectional Digital I/O with TTL input, enabled in INTOSC modes when CLKO is not enabled; alternately CLKO (FOSC/4 in RC mode) or oscillator crystal output OSC2.
32 RC0/P2B/T3CKI/T3G/T1CKI/SOSCO bidirectional Digital I/O with Schmitt Trigger input, also Enhanced CCP2 PWM output P2B, Timer3 clock input T3CKI, Timer3 gate input T3G, Timer1 clock input T1CKI, and secondary oscillator output SOSCO.
33 NC unconnected No connect; not internally connected.
34 NC unconnected No connect; not internally connected.
35 RC1/P2A/CCP2/SOSCI bidirectional Digital I/O with Schmitt Trigger input, also Enhanced CCP2 PWM output P2A, CCP2 capture/compare/PWM, and secondary oscillator input SOSCI.
36 RC2/CTPLS/P1A/CCP1/T5CKI/AN14 bidirectional Digital I/O with Schmitt Trigger input, also CTMU pulse generator output CTPLS, Enhanced CCP1 PWM output P1A, CCP1 capture/compare/PWM, Timer5 clock input T5CKI, and analog input AN14.
37 RC3/SCK1/SCL1/AN15 bidirectional Digital I/O with Schmitt Trigger input, also MSSP1 SPI clock SCK1, MSSP1 I2C clock SCL1, and analog input AN15.
38 RD0/SCK2/SCL2/AN20 bidirectional Digital I/O with Schmitt Trigger input, also MSSP2 SPI clock SCK2, MSSP2 I2C clock SCL2, and analog input AN20.
39 RD1/CCP4/SDI2/SDA2/AN21 bidirectional Digital I/O with Schmitt Trigger input, also CCP4 capture/compare/PWM, MSSP2 SPI data in SDI2, MSSP2 I2C data SDA2, and analog input AN21.
40 RD2/P2B/AN22 bidirectional Digital I/O with Schmitt Trigger input, also Enhanced CCP2 PWM output P2B and analog input AN22.
41 RD3/P2C/SS2/AN23 bidirectional Digital I/O with Schmitt Trigger input, also Enhanced CCP2 PWM output P2C, MSSP2 SPI slave select SS2 (TTL input), and analog input AN23.
42 RC4/SDI1/SDA1/AN16 bidirectional Digital I/O with Schmitt Trigger input, also MSSP1 SPI data in SDI1, MSSP1 I2C data SDA1, and analog input AN16.
43 RC5/SDO1/AN17 bidirectional Digital I/O with Schmitt Trigger input, also MSSP1 SPI data out SDO1 and analog input AN17.
44 RC6/TX1/CK1/AN18 bidirectional Digital I/O with Schmitt Trigger input, also EUSART1 asynchronous transmit TX1, synchronous clock CK1, and analog input AN18.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package TQFP-44(10x10)
Category Embedded Processors & Controllers
Pins 44

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Ambient temperature under bias -40 125 °C under bias 414
Storage temperature -65 150 °C 414
Voltage on any pin with respect to VSS -0.3 V except VDD and MCLR; max printed as VDD + 0.3V 414
Voltage on MCLR with respect to VSS 0 11 V see Note 2 (spikes below VSS) 414
Total power dissipation 1 W Note 1 (Pdis formula) 414
Maximum current out of VSS pin 300 mA -40°C to +85°C 414
Maximum current out of VSS pin 125 mA +85°C to +125°C 414
Maximum current into VDD pin 200 mA -40°C to +85°C 414
Maximum current into VDD pin 85 mA +85°C to +125°C 414
Input clamp current IIK 20 mA VI < 0 or VI > VDD 414
Output clamp current IOK 20 mA VO < 0 or VO > VDD 414
Maximum current sunk by all ports 200 mA -40°C to +85°C 414
Operating temperature TA -40 125 °C Standard Operating Conditions (unless otherwise stated) 417
Supply voltage (PIC18F2X/4XK22) VDD 2.3 5.5 V D001, PIC18F2X/4XK22 417
RAM Data Retention Voltage VDR 1.5 V Note 1: limit to which VDD can be lowered in Sleep or Reset without losing RAM data 417
VDD Start Voltage to ensure internal Power-on Reset signal VPOR 0.7 V See section on Power-on Reset for details 417
VDD Rise Rate to ensure internal Power-on Reset signal SVDD 0.05 V/ms See section on Power-on Reset for details 417
Brown-out Reset Voltage VBOR 1.75 1.9 2.05 V BORV<1:0> = 11 417
Brown-out Reset Voltage VBOR 2.05 2.2 2.35 V BORV<1:0> = 10 417
Brown-out Reset Voltage VBOR 2.35 2.5 2.65 V BORV<1:0> = 01 417
Brown-out Reset Voltage VBOR 2.65 2.85 3.05 V BORV<1:0> = 00 417
Power-down Base Current, Sleep mode IPD 12 25 µA Sleep mode; WDT, BOR, FVR and SOSC disabled; all peripherals inactive; VDD 2.3V; max at +85°C; typ at +25°C 418
Power-down Base Current, Sleep mode IPD 35 µA Sleep mode; WDT, BOR, FVR and SOSC disabled; all peripherals inactive; VDD 2.3V; max at +125°C 418
Power-down Base Current, Sleep mode IPD 13 30 µA Sleep mode; WDT, BOR, FVR and SOSC disabled; all peripherals inactive; VDD 3.0V; max at +85°C; typ at +25°C 418
Power-down Base Current, Sleep mode IPD 40 µA Sleep mode; WDT, BOR, FVR and SOSC disabled; all peripherals inactive; VDD 3.0V; max at +125°C 418
Power-down Base Current, Sleep mode IPD 13 35 µA Sleep mode; WDT, BOR, FVR and SOSC disabled; all peripherals inactive; VDD 5.0V; max at +85°C; typ at +25°C 418
Power-down Base Current, Sleep mode IPD 50 µA Sleep mode; WDT, BOR, FVR and SOSC disabled; all peripherals inactive; VDD 5.0V; max at +125°C 418
Watchdog Timer module differential current delta IPD 0.35 5 µA Watchdog Timer; VDD 2.3V; max at +85°C; typ at +25°C 418
Watchdog Timer module differential current delta IPD 5 µA Watchdog Timer; VDD 2.3V; max at +125°C 418
Watchdog Timer module differential current delta IPD 0.5 5 µA Watchdog Timer; VDD 3.0V; max at +85°C; typ at +25°C 418
Brown-out Reset module differential current delta IPD 3.4 15 µA Brown-out Reset; VDD 2.3V; max at +85°C; typ at +25°C 418
Brown-out Reset module differential current delta IPD 16 µA Brown-out Reset; VDD 2.3V; max at +125°C 418
Brown-out Reset module differential current delta IPD 3.8 15 µA Brown-out Reset; VDD 3.0V; max at +85°C; typ at +25°C 418
Brown-out Reset module differential current delta IPD 5.2 15 µA Brown-out Reset; VDD 5.0V; max at +85°C; typ at +25°C 418
High/Low Voltage Detect module differential current delta IPD 2.1 15 µA High/Low Voltage Detect; VDD 2.3V; max at +85°C; typ at +25°C 418
High/Low Voltage Detect module differential current delta IPD 15 µA High/Low Voltage Detect; VDD 2.3V; max at +125°C 418
High/Low Voltage Detect module differential current delta IPD 2.4 15 µA High/Low Voltage Detect; VDD 3.0V; max at +85°C; typ at +25°C 418
High/Low Voltage Detect module differential current delta IPD 3.2 15 µA High/Low Voltage Detect; VDD 5.0V; max at +85°C; typ at +25°C 418
Secondary Oscillator 32 kHz module differential current delta IPD 0.5 3 µA Secondary Oscillator on SOSC 32 kHz; VDD 2.3V; max at +85°C; typ at +25°C 418
Secondary Oscillator 32 kHz module differential current delta IPD 10 µA Secondary Oscillator on SOSC 32 kHz; VDD 2.3V; max at +125°C 418
Secondary Oscillator 32 kHz module differential current delta IPD 0.6 4 µA Secondary Oscillator on SOSC 32 kHz; VDD 3.0V; max at +85°C; typ at +25°C 418
Secondary Oscillator 32 kHz module differential current delta IPD 0.6 5 µA Secondary Oscillator on SOSC 32 kHz; VDD 5.0V; max at +85°C; typ at +25°C 418
Output Low Voltage, I/O ports VOL 0.6 V IOL = 8 mA, VDD = 5V 429

CAD (KiCad official)

  • Symbol: PIC18F45K22-I
  • Footprint: Package_QFP:TQFP-44_10x10mm_P0.8mm
  • 3D model: TQFP-44(10x10) (KiCad packages3D, STEP)
  • 3D model files: pic18f45k22-i-etched.step / pic18f45k22-i-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pic18f45k22-i.step / pic18f45k22-i.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (539 pp, sha256 dbf68925f53cc096, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF