component
PIC18F45J10-I
Public Made by Adomby adom
Microchip Tech MICROCHIP, TQFP-44(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 7h ago |
| viewers | 7h ago |
| package.json | 7h ago |
| page.json | 7h ago |
| pic18f45j10-i-etched.glb | 7h ago |
| pic18f45j10-i-etched.step | 7h ago |
| pic18f45j10-i-hero.glb | 7h ago |
| pic18f45j10-i-hero.overlay.json | 7h ago |
| pic18f45j10-i.glb | 7h ago |
| pic18f45j10-i.kicad_mod | 7h ago |
| pic18f45j10-i.kicad_sym | 7h ago |
| pic18f45j10-i.lbr | 7h ago |
| pic18f45j10-i.step | 7h ago |
| README.md | 7h ago |
PIC18F45J10-I
Microchip Tech · MICROCHIP · TQFP-44(10x10)
PIC18F45J10-I from Microchip Tech, in a TQFP-44(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | RC7/RX/DT | bidirectional | PORTC digital I/O (ST), EUSART asynchronous receive, or EUSART synchronous data. |
| 2 | RD4/PSP4 | bidirectional | PORTD digital I/O (ST) or Parallel Slave Port data (TTL). |
| 3 | RD5/PSP5/P1B | bidirectional | PORTD digital I/O (ST), Parallel Slave Port data, or Enhanced CCP1 output P1B. |
| 4 | RD6/PSP6/P1C | bidirectional | PORTD digital I/O (ST), Parallel Slave Port data, or Enhanced CCP1 output P1C. |
| 5 | RD7/PSP7/P1D | bidirectional | PORTD digital I/O (ST), Parallel Slave Port data, or Enhanced CCP1 output P1D. |
| 6 | VSS | power_in | Ground reference for logic and I/O pins. |
| 7 | VDD | power_in | Positive supply for logic and I/O pins. |
| 8 | RB0/INT0/FLT0/AN12 | bidirectional | PORTB digital I/O (TTL) with weak pull-up option, External Interrupt 0, PWM fault input for Enhanced CCP1, or Analog input 12. |
| 9 | RB1/INT1/AN10 | bidirectional | PORTB digital I/O (TTL) with weak pull-up option, External Interrupt 1, or Analog input 10. |
| 10 | RB2/INT2/AN8 | bidirectional | PORTB digital I/O (TTL) with weak pull-up option, External Interrupt 2, or Analog input 8. |
| 11 | RB3/AN9/CCP2 | bidirectional | PORTB digital I/O (TTL), Analog input 9, or Capture 2 input/Compare 2 output/PWM2 output (default CCP2 assignment when CCP2MX is set, per Note 1). |
| 12 | NC | unconnected | No connect. |
| 13 | NC | unconnected | No connect. |
| 14 | RB4/KBI0/AN11 | bidirectional | PORTB digital I/O (TTL), interrupt-on-change pin, or Analog input 11. |
| 15 | RB5/KBI1/C1OUT | bidirectional | PORTB digital I/O (TTL), interrupt-on-change pin, or Comparator 1 output. |
| 16 | RB6/KBI2/PGC | bidirectional | PORTB digital I/O (TTL), interrupt-on-change pin, or In-Circuit Debugger and ICSP programming clock pin. |
| 17 | RB7/KBI3/PGD | bidirectional | PORTB digital I/O (TTL), interrupt-on-change pin, or In-Circuit Debugger and ICSP programming data pin. |
| 18 | MCLR | input | Active-low Master Clear (Reset) input (ST) or programming voltage input. |
| 19 | RA0/AN0 | bidirectional | PORTA digital I/O (TTL) or Analog Input 0. |
| 20 | RA1/AN1 | bidirectional | PORTA digital I/O (TTL) or Analog Input 1. |
| 21 | RA2/AN2/VREF-/CVREF | bidirectional | PORTA digital I/O (TTL), Analog Input 2, A/D reference voltage (low) input, or comparator reference voltage output. |
| 22 | RA3/AN3/VREF+ | bidirectional | PORTA digital I/O (TTL), Analog Input 3, or A/D reference voltage (high) input. |
| 23 | VDDCORE/VCAP | power_in | Core supply pin: VDDCORE (external supply) on LF devices, VCAP (regulator filter capacitor to ground, low-ESR, 10 uF typical) on F devices; must not be tied to VDD on F devices. |
| 24 | RA5/AN4/SS1/C2OUT | bidirectional | PORTA digital I/O (TTL), Analog Input 4, SPI slave select input, or Comparator 2 output. |
| 25 | RE0/RD/AN5 | bidirectional | PORTE digital I/O (ST), Parallel Slave Port read control, or Analog input 5. |
| 26 | RE1/WR/AN6 | bidirectional | PORTE digital I/O (ST), Parallel Slave Port write control, or Analog input 6. |
| 27 | RE2/CS/AN7 | bidirectional | PORTE digital I/O (ST), Parallel Slave Port chip select control, or Analog input 7. |
| 28 | VDD | power_in | Positive supply for logic and I/O pins. |
| 29 | VSS | power_in | Ground reference for logic and I/O pins. |
| 30 | OSC1/CLKI | input | Oscillator crystal input or external clock source input (CMOS). |
| 31 | OSC2/CLKO | output | Oscillator crystal output, or in EC/RC mode CLKO at 1/4 the OSC1 frequency denoting the instruction cycle rate. |
| 32 | RC0/T1OSO/T1CKI | bidirectional | PORTC digital I/O (ST), Timer1 oscillator output, or Timer1 external clock input. |
| 33 | NC | unconnected | No connect. |
| 34 | NC | unconnected | No connect. |
| 35 | RC1/T1OSI/CCP2 | bidirectional | PORTC digital I/O (ST), Timer1 oscillator input, or Capture 2 input/Compare 2 output/PWM2 output (alternate assignment when CCP2MX is cleared). |
| 36 | RC2/CCP1/P1A | bidirectional | PORTC digital I/O (ST), Capture 1 input/Compare 1 output/PWM1 output, or Enhanced CCP1 output P1A. |
| 37 | RC3/SCK1/SCL1 | bidirectional | PORTC digital I/O (ST), synchronous serial clock for SPI mode, or synchronous serial clock for I2C mode. |
| 38 | RD0/PSP0/SCK2/SCL2 | bidirectional | PORTD digital I/O (ST), Parallel Slave Port data, MSSP2 SPI clock, or MSSP2 I2C clock. |
| 39 | RD1/PSP1/SDI2/SDA2 | bidirectional | PORTD digital I/O (ST), Parallel Slave Port data, SPI data in, or I2C data I/O. |
| 40 | RD2/PSP2/SDO2 | bidirectional | PORTD digital I/O (ST), Parallel Slave Port data, or SPI data out. |
| 41 | RD3/PSP3/SS2 | bidirectional | PORTD digital I/O (ST), Parallel Slave Port data, or SPI slave select input. |
| 42 | RC4/SDI1/SDA1 | bidirectional | PORTC digital I/O (ST), SPI data in, or I2C data I/O. |
| 43 | RC5/SDO1 | bidirectional | PORTC digital I/O (ST) or SPI data out. |
| 44 | RC6/TX/CK | bidirectional | PORTC digital I/O (ST), EUSART asynchronous transmit, or EUSART synchronous clock. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | TQFP-44(10x10) |
| Category | Embedded Processors & Controllers |
| Pins | 44 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage (F device, regulator enabled) | VDD | 2.7 | 3.6 | V | F part number, on-chip regulator enabled | 10 | |
| Operating frequency | 0 | 40 | MHz | DC - 40 MHz | 11 | ||
| Input voltage tolerance on digital-only input pins | 5.5 | V | Digital-only input pins (PORTB<7:6>, PORTC<7:2>, PORTD<7:0>) | 99 | |||
| High-current sink/source (PORTB and PORTC) | 25 | mA | 25 mA/25 mA sink/source | 3 | |||
| VCAP/VDDCORE capacitor ESR | ESR | 5 | Ω | Regulator enabled (F devices), low-ESR capacitor on VCAP/VDDCORE | 27 | ||
| VCAP/VDDCORE capacitor value | CVCAP | 10 | µF | Regulator enabled (F devices), ceramic or tantalum to ground | 27 |
CAD (KiCad official)
- Symbol:
PIC18F45J10-I - Footprint:
Package_QFP:TQFP-44_10x10mm_P0.8mm - 3D model: TQFP-44(10x10) (KiCad packages3D, STEP)
- 3D model files:
pic18f45j10-i-etched.step/pic18f45j10-i-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pic18f45j10-i.step/pic18f45j10-i.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (368 pp, sha256
200de743a909cb1c, retrieved 2026-10-27, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).