component
PIC18F4520-I
Public Made by Adomby adom
Microchip Tech Microcontrollers (MCU/MPU/SOC), TQFP-44(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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PIC18F4520-I
Microchip Tech · Microcontrollers (MCU/MPU/SOC) · TQFP-44(10x10)
PIC18F4520-I from Microchip Tech, in a TQFP-44(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | RC7/RX/DT | bidirectional | Digital I/O with Schmitt Trigger input; EUSART asynchronous receive input or synchronous data I/O. |
| 2 | RD4/PSP4 | bidirectional | Digital I/O with Schmitt Trigger input; Parallel Client Port data bit 4 when PSP is enabled. |
| 3 | RD5/PSP5/P1B | bidirectional | Digital I/O; Parallel Client Port data bit 5; Enhanced CCP1 PWM output P1B. |
| 4 | RD6/PSP6/P1C | bidirectional | Digital I/O; Parallel Client Port data bit 6; Enhanced CCP1 PWM output P1C. |
| 5 | RD7/PSP7/P1D | bidirectional | Digital I/O; Parallel Client Port data bit 7; Enhanced CCP1 PWM output P1D. |
| 6 | VSS | power_in | Ground reference for logic and I/O pins. |
| 7 | VDD | power_in | Positive supply for logic and I/O pins. |
| 8 | RB0/INT0/FLT0/AN12 | bidirectional | Digital I/O with weak pull-up when RBPU is cleared; external interrupt 0, ECCP1 PWM Fault input, and analog input 12. |
| 9 | RB1/INT1/AN10 | bidirectional | Digital I/O with weak pull-up when RBPU is cleared; external interrupt 1 and analog input 10. |
| 10 | RB2/INT2/AN8 | bidirectional | Digital I/O with weak pull-up when RBPU is cleared; external interrupt 2 and analog input 8. |
| 11 | RB3/AN9/CCP2 | bidirectional | Digital I/O with weak pull-up when RBPU is cleared; analog input 9; CCP2 capture input or compare/PWM output when CCP2MX is cleared. |
| 12 | NC | unconnected | No Connect. |
| 13 | NC | unconnected | No Connect. |
| 14 | RB4/KBI0/AN11 | bidirectional | Digital I/O with weak pull-up when RBPU is cleared; interrupt-on-change pin and analog input 11. |
| 15 | RB5/KBI1/PGM | bidirectional | Digital I/O with weak pull-up when RBPU is cleared; interrupt-on-change pin and low-voltage ICSP programming enable pin. |
| 16 | RB6/KBI2/PGC | bidirectional | Digital I/O with weak pull-up when RBPU is cleared; interrupt-on-change pin and In-Circuit Debugger/ICSP programming clock pin. |
| 17 | RB7/KBI3/PGD | bidirectional | Digital I/O with weak pull-up when RBPU is cleared; interrupt-on-change pin and In-Circuit Debugger/ICSP programming data pin. |
| 18 | MCLR/VPP/RE3 | input | Active-low Master Clear (Reset) input when MCLRE is set, otherwise digital input RE3; VPP is the high-voltage programming/ICSP entry detection input. |
| 19 | RA0/AN0 | bidirectional | Digital I/O; analog input 0. |
| 20 | RA1/AN1 | bidirectional | Digital I/O; analog input 1. |
| 21 | RA2/AN2/VREF-/CVREF | bidirectional | Digital I/O; analog input 2; A/D reference voltage (low) input; comparator reference voltage output. |
| 22 | RA3/AN3/VREF+ | bidirectional | Digital I/O; analog input 3; A/D reference voltage (high) input. |
| 23 | RA4/T0CKI/C1OUT | bidirectional | Digital I/O with Schmitt Trigger input; Timer0 external clock input; comparator 1 output. |
| 24 | RA5/AN4/SS/HLVDIN/C2OUT | bidirectional | Digital I/O; analog input 4; SPI client select input; High/Low-Voltage Detect input; comparator 2 output. |
| 25 | RE0/RD/AN5 | bidirectional | Digital I/O with Schmitt Trigger input; Parallel Client Port read control input when PSP is enabled; analog input 5. |
| 26 | RE1/WR/AN6 | bidirectional | Digital I/O with Schmitt Trigger input; Parallel Client Port write control input when PSP is enabled; analog input 6. |
| 27 | RE2/CS/AN7 | bidirectional | Digital I/O with Schmitt Trigger input; Parallel Client Port chip select input when PSP is enabled; analog input 7. |
| 28 | VDD | power_in | Positive supply for logic and I/O pins. |
| 29 | VSS | power_in | Ground reference for logic and I/O pins. |
| 30 | OSC1/CLKI/RA7 | input | Oscillator crystal or external clock input; RA7 digital I/O when not used as an oscillator pin. |
| 31 | OSC2/CLKO/RA6 | bidirectional | Oscillator crystal output or CLKO (FOSC/4) output in RC/EC modes; RA6 digital I/O in RCIO, INTIO2 and ECIO modes. |
| 32 | RC0/T1OSO/T13CKI | bidirectional | Digital I/O with Schmitt Trigger input; Timer1 oscillator output; Timer1/Timer3 external clock input. |
| 33 | NC | unconnected | No Connect. |
| 34 | NC | unconnected | No Connect. |
| 35 | RC1/T1OSI/CCP2 | bidirectional | Digital I/O with Schmitt Trigger input; Timer1 oscillator input; CCP2 capture input/compare or PWM output (default pin when CCP2MX is set). |
| 36 | RC2/CCP1/P1A | bidirectional | Digital I/O with Schmitt Trigger input; CCP1 capture input/compare or PWM output; Enhanced CCP1 PWM output P1A. |
| 37 | RC3/SCK/SCL | bidirectional | Digital I/O with Schmitt Trigger input; MSSP synchronous serial clock input/output for SPI and I2C modes. |
| 38 | RD0/PSP0 | bidirectional | Digital I/O with Schmitt Trigger input; Parallel Client Port data bit 0 (TTL input when PSP enabled). |
| 39 | RD1/PSP1 | bidirectional | Digital I/O with Schmitt Trigger input; Parallel Client Port data bit 1 (TTL input when PSP enabled). |
| 40 | RD2/PSP2 | bidirectional | Digital I/O with Schmitt Trigger input; Parallel Client Port data bit 2 (TTL input when PSP enabled). |
| 41 | RD3/PSP3 | bidirectional | Digital I/O with Schmitt Trigger input; Parallel Client Port data bit 3 (TTL input when PSP enabled). |
| 42 | RC4/SDI/SDA | bidirectional | Digital I/O with Schmitt Trigger input; MSSP SPI data input or I2C data I/O. |
| 43 | RC5/SDO | bidirectional | Digital I/O with Schmitt Trigger input; MSSP SPI data output. |
| 44 | RC6/TX/CK | bidirectional | Digital I/O with Schmitt Trigger input; EUSART asynchronous transmit or synchronous clock output/input. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | TQFP-44(10x10) |
| Category | Embedded Processors & Controllers |
| Pins | 44 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating VDD range, standard F device (PIC18F4520, not LF) | VDD | 4.2 | 5.5 | V | Standard 'F' devices; the 2.0V to 5.5V range is for LF parts and is excluded | 6 | |
| Operating frequency | 40 | MHz | Printed as 'DC, 40 MHz' (Table 1-1, PIC18F4520) | 7 | |||
| High-current sink | 25 | mA | Peripheral highlight 'High-Current Sink/Source 25 mA/25 mA' | 1 | |||
| High-current source | 25 | mA | Peripheral highlight 'High-Current Sink/Source 25 mA/25 mA' | 1 | |||
| Maximum recommended source impedance for A/D analog inputs | RS | 2.5 | kΩ | Maximum recommended impedance for analog sources (A/D conversion accuracy) | 219 | ||
| Maximum recommended source impedance for comparator analog inputs | RS | 10 | kΩ | Maximum recommended for analog sources to comparator inputs | 228 | ||
| External resistor REXT for RC oscillator | REXT | 3 | 100 | kΩ | Recommended values for RC oscillator mode | 22 | |
| External capacitor CEXT for RC oscillator | CEXT | 20 | pF | Recommended CEXT > 20 pF for RC oscillator mode | 22 | ||
| MCLR pull-up resistor to VDD (POR circuit) | 1 | 10 | kΩ | Tie MCLR to VDD through resistor, 1 kΩ to 10 kΩ, to eliminate external POR RC | 39 |
CAD (KiCad official)
- Symbol:
PIC18F4520-I - Footprint:
Package_QFP:TQFP-44_10x10mm_P0.8mm - 3D model: TQFP-44(10x10) (KiCad packages3D, STEP)
- 3D model files:
pic18f4520-i-etched.step/pic18f4520-i-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pic18f4520-i.step/pic18f4520-i.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (383 pp, sha256
7a3ba485a1cab451, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).