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PIC18F26K40-I

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Microchip Tech MICROCHIP, SSOP-28-208mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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PIC18F26K40-I

Microchip Tech · MICROCHIP · SSOP-28-208mil

PIC18F26K40-I from Microchip Tech, in a SSOP-28-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 RE3/MCLR/VPP input Input-only port pin RE3 with interrupt-on-change (IOCE3) and weak pull-up that serves as Master Clear (MCLR) Reset input and Vpp programming voltage input.
2 RA0 bidirectional PORTA bit 0 I/O with analog input ANA0, comparator inputs C1IN0-/C2IN0-, interrupt-on-change IOCA0 and weak pull-up.
3 RA1 bidirectional PORTA bit 1 I/O with analog input ANA1, comparator inputs C1IN1-/C2IN1-, interrupt-on-change IOCA1 and weak pull-up.
4 RA2 bidirectional PORTA bit 2 I/O with analog input ANA2, DAC1OUT1 output, Vref- (DAC) and Vref- (ADC) reference input, comparator inputs C1IN0+/C2IN0+, IOCA2 and weak pull-up.
5 RA3 bidirectional PORTA bit 3 I/O with analog input ANA3, Vref+ (DAC) and Vref+ (ADC) reference input, comparator input C1IN1+, MDCARL (PPS input), IOCA3 and weak pull-up.
6 RA4 bidirectional PORTA bit 4 I/O with analog input ANA4, T0CKI (PPS input), MDCARH (PPS input), IOCA4 and weak pull-up.
7 RA5 bidirectional PORTA bit 5 I/O with analog input ANA5, MDSRC (PPS input), SS1 MSSP slave select (PPS input), IOCA5 and weak pull-up.
8 VSS power_in Ground reference; all VSS pins must be connected.
9 RA7/OSC1/CLKIN bidirectional PORTA bit 7 I/O with analog input ANA7, OSC1 crystal/resonator input or CLKIN external clock input, IOCA7 and weak pull-up.
10 RA6/OSC2/CLKOUT bidirectional PORTA bit 6 I/O with analog input ANA6, OSC2 crystal/resonator connection or CLKOUT (FOSC/4) output, IOCA6 and weak pull-up.
11 RC0/SOSCO bidirectional PORTC bit 0 I/O with analog input ANC0, secondary oscillator output SOSCO, T1CKI/T3CKI/T3G (PPS inputs), IOCC0 and weak pull-up.
12 RC1/SOSCIN/SOSCI bidirectional PORTC bit 1 I/O with analog input ANC1, secondary oscillator input SOSCIN/SOSCI, CCP2 (PPS input), IOCC1 and weak pull-up.
13 RC2 bidirectional PORTC bit 2 I/O with analog input ANC2, T5CKI and CCP1 (PPS inputs), IOCC2 and weak pull-up.
14 RC3 bidirectional PORTC bit 3 I/O with analog input ANC3, T2IN, MSSP1 SCK1/SCL1 (I2C logic levels), IOCC3 and weak pull-up.
15 RC4 bidirectional PORTC bit 4 I/O with analog input ANC4, MSSP1 SDI1/SDA1 (I2C logic levels), IOCC4 and weak pull-up.
16 RC5 bidirectional PORTC bit 5 I/O with analog input ANC5, T4IN (PPS input), IOCC5 and weak pull-up.
17 RC6 bidirectional PORTC bit 6 I/O with analog input ANC6, EUSART1 CK1 (bidirectional), IOCC6 and weak pull-up.
18 RC7 bidirectional PORTC bit 7 I/O with analog input ANC7, EUSART1 RX1/DT1 (bidirectional), IOCC7 and weak pull-up.
19 VSS power_in Ground reference; all VSS pins must be connected.
20 VDD power_in Positive supply; must always be connected and decoupled with a 0.1 uF capacitor (2.3V to 5.5V for PIC18F26K40).
21 RB0 bidirectional PORTB bit 0 I/O with analog input ANB0, comparator input C2IN1+, CWG1 and ZCDIN inputs, INT0 external interrupt, IOCB0 and weak pull-up.
22 RB1 bidirectional PORTB bit 1 I/O with analog input ANB1, comparator inputs C1IN3-/C2IN3-, INT1 external interrupt, IOCB1 and weak pull-up.
23 RB2 bidirectional PORTB bit 2 I/O with analog input ANB2, INT2 external interrupt, IOCB2 and weak pull-up.
24 RB3 bidirectional PORTB bit 3 I/O with analog input ANB3, comparator inputs C1IN2-/C2IN2-, IOCB3 and weak pull-up.
25 RB4 bidirectional PORTB bit 4 I/O with analog input ANB4, T5G (PPS input), IOCB4 and weak pull-up.
26 RB5 bidirectional PORTB bit 5 I/O with analog input ANB5, T1G (PPS input), IOCB5 and weak pull-up.
27 RB6/ICSPCLK bidirectional PORTB bit 6 I/O with analog input ANB6, ICSP programming clock input ICSPCLK, IOCB6 and weak pull-up.
28 RB7/ICSPDAT bidirectional PORTB bit 7 I/O with analog input ANB7, DAC1OUT2 output, T6IN (PPS input), ICSP programming data I/O ICSPDAT, IOCB7 and weak pull-up.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package SSOP-28-208mil
Category Embedded Processors & Controllers
Pins 28

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Operating supply voltage (FOSC<=16 MHz) VDD 2.3 5.5 V FOSC ≤ 16 MHz 671
Operating supply voltage (FOSC>16 MHz) VDD 2.5 5.5 V FOSC > 16 MHz 671
Operating supply voltage (FOSC>32 MHz) VDD 3 5.5 V FOSC > 32 MHz 671
Operating ambient temperature, industrial TA -40 85 °C Industrial 669
RAM data retention voltage VDR 1.7 V Device in Sleep mode 671
VDD rise rate for POR SVDD 0.05 V/ms BOR or LPBOR disabled 671
Supply current XT 4 MHz IDDXT4 550 750 μA XT = 4 MHz, 3.0V 673
Supply current HFINTOSC 16 MHz IDDHFO16 2 2.7 mA HFINTOSC = 16 MHz, 3.0V 673
Supply current HFINTOSC 64 MHz IDDHFOPLL 7.5 9.5 mA HFINTOSC = 64 MHz, 3.0V 673
Supply current HS+PLL 64 MHz IDDHSPLL64 7 9 mA HS+PLL = 64 MHz, 3.0V 673
Power-down base current (max 85°C) IPD 0.4 4 μA 3.0V, VREGPM=1, max at +85°C (12 at +125°C) 674
WDT power-down current IPD_WDT 0.6 5 μA 3.0V, max at +85°C 674
SOSC power-down current IPD_SOSC 0.8 8.5 μA 3.0V, max at +85°C 674
LPBOR power-down current IPD_LPBOR 0.7 5 μA 3.0V, max at +85°C 675
FVR power-down current IPD_FVR 32 53 μA 3.0V, FVRCON = 0x81 or 0x84, max at +85°C 675
BOR power-down current IPD_BOR 14 19 μA 3.0V, max at +85°C 675
Comparator power-down current IPD_CMP 31 47 μA 3.0V, max at +85°C 675
Input low voltage, TTL VIL 0.8 V 4.5V≤VDD≤5.5V 675
Input low voltage, Schmitt Trigger VIL 0.2 V 0.2 VDD, 2.0V≤VDD≤5.5V 675
Input low voltage MCLR VIL 0.2 V 0.2 VDD 675
Input high voltage, TTL VIH 2 V 4.5V≤VDD≤5.5V 676
Input high voltage, Schmitt Trigger VIH 0.8 V 0.8 VDD, 2.0V≤VDD≤5.5V 676
Input high voltage MCLR VIH 0.7 V 0.7 VDD 676
Input leakage current I/O IIL -125 5 125 nA VSS≤VPIN≤VDD, 85°C 676
Weak pull-up current IPUR 25 120 200 μA VDD=3.0V, VPIN=VSS 676
Output low voltage VOL 0.6 V IOL=10.0 mA, VDD=3.0V 676
Output high voltage VOH 0 V VDD-0.7, IOH=6.0 mA, VDD=3.0V 676
I/O pin capacitance CIO 5 50 pF 676
Brown-out Reset voltage BORV=00 VBOR 2.7 2.85 3 V BORV=00 683
Brown-out Reset voltage BORV=01 VBOR 2.55 2.7 2.85 V BORV=01 683
Brown-out Reset voltage BORV=10 VBOR 2.3 2.45 2.6 V BORV=10 683
Brown-out Reset voltage BORV=11 VBOR 2.3 2.45 2.6 V BORV=11 (F devices only) 683
Low-Power BOR voltage VLPBOR 1.8 1.9 2.5 V 683
FVR 1x gain accuracy VFVR1 -4 4 % VDD≥2.5V, -40°C to 85°C 686
FVR 2x gain accuracy VFVR2 -4 4 % VDD≥2.5V, -40°C to 85°C 686
FVR 4x gain accuracy VFVR4 -5 5 % VDD≥4.75V, -40°C to 85°C 686
ADC integral error EIL -1 0.1 1 LSb ADCREF+=3.0V, ADCREF- = 0V 684
ADC differential error EDL -1 0.1 1 LSb ADCREF+=3.0V, ADCREF- = 0V 684
ADC offset error EOFF -2.5 0.5 2.5 LSb ADCREF+=3.0V, ADCREF- = 0V 684
ADC gain error EGN -1.5 0.2 1.5 LSb ADCREF+=3.0V, ADCREF- = 0V 684
ADC reference voltage VADREF 1.8 V max is VDD 684
Comparator input offset voltage VIOFF -60 60 mV VICM=VDD/2 685
Comparator hysteresis VHYST 10 25 40 mV 686
DAC absolute accuracy VACC -5 5 LSb 686
Secondary oscillator frequency FSEC 32.4 32.768 33.1 kHz Note 4 679
PLL jitter FPLLJIT -0.25 0.25 % 680
Storage temperature -65 150 °C 668
Ambient temperature under bias -40 125 °C 668
Voltage on VDD pin, PIC18F26/45/46K40 VDD -0.3 6.5 V with respect to VSS 668
Voltage on MCLR pin -0.3 9 V with respect to VSS 668
Current on VSS pin 350 mA -40°C ≤ TA ≤ +85°C 668
Current on VDD pin, 28-pin 250 mA -40°C ≤ TA ≤ +85°C 668
Current on any standard I/O pin -50 50 mA 668
Clamp current IK -20 20 mA VPIN < 0 or VPIN > VDD 668
Total power dissipation 800 mW 668
Thermal resistance junction to ambient θJA 90 °C/W 28-pin SSOP package 677
Thermal resistance junction to case θJC 24 °C/W 28-pin SSOP package 677
Maximum junction temperature TJMAX 150 °C 677

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing PPS body RxyPPS 296

CAD (KiCad official)

  • Symbol: PIC18F26K40-I
  • Footprint: Package_SO:SSOP-28_5.3x10.2mm_P0.65mm
  • 3D model: SSOP-28-208mil (KiCad packages3D, STEP)
  • 3D model files: pic18f26k40-i-etched.step / pic18f26k40-i-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pic18f26k40-i.step / pic18f26k40-i.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (755 pp, sha256 e86a60cc739f0fa4, retrieved 2026-10-23, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF