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PIC18F25Q10-I
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Microchip Tech Pre-ordered MCUs, QFN-28-EP(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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Datasheet
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Contents
README
markdownPIC18F25Q10-I
Microchip Tech · Pre-ordered MCUs · QFN-28-EP(6x6)
PIC18F25Q10-I from Microchip Tech, in a QFN-28-EP(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | RA2 | bidirectional | PORTA bit 2 general-purpose I/O pin, with interrupt-on-change and analog input capability. |
| 2 | RA3 | bidirectional | PORTA bit 3 general-purpose I/O pin, with interrupt-on-change and analog input capability. |
| 3 | RA4 | bidirectional | PORTA bit 4 general-purpose I/O pin, with interrupt-on-change and analog input capability. |
| 4 | RA5 | bidirectional | PORTA bit 5 general-purpose I/O pin, with interrupt-on-change and analog input capability. |
| 5 | VSS | power_in | Ground reference; all VDD and VSS pins must always be connected. |
| 6 | RA7 | bidirectional | PORTA bit 7 general-purpose I/O pin, with interrupt-on-change; also usable for the external oscillator. |
| 7 | RA6 | bidirectional | PORTA bit 6 general-purpose I/O pin, with interrupt-on-change; also usable for the external oscillator. |
| 8 | RC0 | bidirectional | PORTC bit 0 general-purpose I/O pin, with interrupt-on-change and PPS-selectable digital functions. |
| 9 | RC1 | bidirectional | PORTC bit 1 general-purpose I/O pin, with interrupt-on-change and PPS-selectable digital functions. |
| 10 | RC2 | bidirectional | PORTC bit 2 general-purpose I/O pin, with interrupt-on-change and PPS-selectable digital functions. |
| 11 | RC3 | bidirectional | PORTC bit 3 general-purpose I/O pin, with interrupt-on-change and PPS-selectable digital functions. |
| 12 | RC4 | bidirectional | PORTC bit 4 general-purpose I/O pin, with interrupt-on-change and PPS-selectable digital functions. |
| 13 | RC5 | bidirectional | PORTC bit 5 general-purpose I/O pin, with interrupt-on-change and PPS-selectable digital functions. |
| 14 | RC6 | bidirectional | PORTC bit 6 general-purpose I/O pin, with interrupt-on-change and PPS-selectable digital functions. |
| 15 | RC7 | bidirectional | PORTC bit 7 general-purpose I/O pin, with interrupt-on-change and PPS-selectable digital functions. |
| 16 | VSS | power_in | Ground reference; all VDD and VSS pins must always be connected. |
| 17 | VDD | power_in | Positive supply; decoupling with a 0.1 uF ceramic capacitor on each VDD/VSS pair is required. |
| 18 | RB0 | bidirectional | PORTB bit 0 general-purpose I/O pin, with interrupt-on-change (INT0PPS default pin). |
| 19 | RB1 | bidirectional | PORTB bit 1 general-purpose I/O pin, with interrupt-on-change (INT1PPS default pin). |
| 20 | RB2 | bidirectional | PORTB bit 2 general-purpose I/O pin, with interrupt-on-change (INT2PPS default pin). |
| 21 | RB3 | bidirectional | PORTB bit 3 general-purpose I/O pin, with interrupt-on-change. |
| 22 | RB4 | bidirectional | PORTB bit 4 general-purpose I/O pin, with interrupt-on-change (T5GPPS and ADACTPPS default pin). |
| 23 | RB5 | bidirectional | PORTB bit 5 general-purpose I/O pin, with interrupt-on-change (T1GPPS default pin). |
| 24 | RB6/ICSPCLK | bidirectional | PORTB bit 6 I/O pin that is also the ICSP programming and debugging clock; pull-ups, series diodes and capacitors are not recommended. |
| 25 | RB7/ICSPDAT | bidirectional | PORTB bit 7 I/O pin that is also the ICSP programming and debugging data line; pull-ups, series diodes and capacitors are not recommended. |
| 26 | RE3/MCLR/VPP | input | Input-only RE3 / Master Clear reset (held low keeps device in Reset, internal weak pull-up to VDD) and high-voltage programming input VPP. |
| 27 | RA0 | bidirectional | PORTA bit 0 general-purpose I/O pin, with interrupt-on-change and analog input capability (AN0). |
| 28 | RA1 | bidirectional | PORTA bit 1 general-purpose I/O pin, with interrupt-on-change and analog input capability. |
| 29 | EP | passive | Exposed bottom pad; recommended to be connected to VSS but must not be the only VSS connection to the device. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | QFN-28-EP(6x6) |
| Category | Embedded Processors & Controllers |
| Pins | 29 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VDD | 1.8 | 5.5 | V | 660 | ||
| Operating Ambient Temperature, Industrial | TA | -40 | 85 | °C | Industrial Temperature | 660 | |
| RAM Data Retention Voltage | VDR | 1.7 | V | Device in SLEEP mode | 660 | ||
| Ambient temperature under bias | -40 | 125 | °C | 659 | |||
| Storage temperature | -65 | 150 | °C | 659 | |||
| Voltage on VDD pin with respect to VSS | VDD | -0.3 | 6.5 | V | 659 | ||
| Voltage on MCLR pin with respect to VSS | MCLR | -0.3 | 9 | V | 659 | ||
| Maximum current on VSS pin | 350 | mA | -40°C ≤ TA ≤ +85°C | 659 | |||
| Maximum current on VDD pin | 250 | mA | -40°C ≤ TA ≤ +85°C | 659 | |||
| Maximum current on any standard I/O pin | -50 | 50 | mA | 659 | |||
| Clamp current | IK | -20 | 20 | mA | VPIN < 0 or VPIN > VDD | 659 | |
| Total power dissipation | 800 | mW | 659 | ||||
| Thermal Resistance Junction to Ambient | θJA | 27.5 | °C/W | 28-pin QFN 6x6mm package | 666 | ||
| Maximum Junction Temperature | TJMAX | 150 | °C | 666 | |||
| Supply current XT = 4 MHz | IDDXT4 | 440 | 700 | μA | 3.0V | 662 | |
| Supply current HFINTOSC = 16 MHz | IDDHFO16 | 1.2 | 1.55 | mA | 3.0V | 662 | |
| Supply current HFINTOSC = 64 MHz | IDDHFOPLL | 4 | 5.3 | mA | 3.0V | 662 | |
| Supply current HS+PLL = 64 MHz | IDDHSPLL32 | 3.9 | 5.1 | mA | 3.0V | 662 | |
| Power-down current base | IPD | 0.6 | 4 | μA | 3.0V, VREGPM b'10', max at +85°C | 663 | |
| Power-down current LFINTOSC/WDT | IPD_WDT | 0.9 | 5 | μA | 3.0V, VREGPM b'10', max at +85°C | 663 | |
| Power-down current LPBOR | IPD_LPBOR | 0.9 | 6 | μA | 3.0V, VREGPM b'10', max at +85°C | 663 | |
| Power-down current FVR | IPD_FVR | 63 | 125 | μA | 3.0V, VREGPM b'10', FVRCON = 0x81 or 0x84, max at +85°C | 663 | |
| Power-down current BOR | IPD_BOR | 30 | 60 | μA | 3.0V, VREGPM b'10', max at +85°C | 663 | |
| Power-down current Comparator | IPD_CMP | 48 | 75 | μA | 3.0V, VREGPM b'10', only one comparator active, max at +85°C | 663 | |
| Input Low Voltage, TTL buffer | VIL | 0.8 | V | 4.5V≤VDD≤5.5V | 664 | ||
| Input Low Voltage, SMBus levels | VIL | 0.8 | V | 2.7V≤VDD≤5.5V | 664 | ||
| Input High Voltage, TTL buffer | VIH | 2 | V | 4.5V≤VDD≤5.5V | 664 | ||
| Input High Voltage, SMBus levels | VIH | 2.1 | V | 2.7V≤VDD≤5.5V | 664 | ||
| Input Leakage Current, I/O ports | IIL | -125 | 5 | 125 | nA | VSS≤VPIN≤VDD, Pin at high-impedance, 85°C | 664 |
| Input Leakage Current, MCLR | IIL | -200 | 50 | 200 | nA | VSS≤VPIN≤VDD, Pin at high-impedance, 85°C | 664 |
| Weak Pull-up Current | IPUR | 80 | 140 | 200 | μA | VDD=3.0V, VPIN=VSS | 664 |
| Output Low Voltage, I/O ports | VOL | 0.6 | V | IOL=10.0 mA, VDD=3.0V | 664 | ||
| All I/O Pins capacitance | CIO | 5 | 50 | pF | 664 | ||
| Byte Erase and Write Cycle Time | TD_BEW | 10 | 11 | ms | 665 | ||
| Self-Timed Sector Write | TP_REW | 6 | 10 | ms | 665 | ||
| Self-Timed Sector Erase | TSE | 10 | 14 | ms | 665 | ||
| Brown-out Reset Voltage | VBOR | 2.7 | 2.85 | 3 | V | BORV=00 | 672 |
| Brown-out Reset Voltage | VBOR | 1.8 | 1.9 | 2.1 | V | BORV=11 | 672 |
| Precision Calibrated HFINTOSC accuracy, best region | FHFOSC | -2 | 2 | % | Figure 38-5 central region | 669 | |
| ADC Resolution | NR | 10 | bit | 673 | |||
| ADC Integral Error | EIL | -1 | 0.1 | 1 | LSb | ADCREF+=3.0V, ADCREF-=0V | 673 |
| ADC Offset Error | EOFF | -2 | 0.5 | 2 | LSb | ADCREF+=3.0V, ADCREF-=0V | 673 |
| Comparator Input Offset Voltage | VIOFF | -60 | 60 | mV | VICM=VDD/2 | 675 | |
| Comparator Hysteresis | VHYST | 10 | 25 | 45 | mV | 676 | |
| FVR 1x Gain (1.024V) tolerance | VFVR1 | -4 | 4 | % | VDD≥2.5V, -40°C to 85°C | 676 | |
| FVR 4x Gain (4.096V) tolerance | VFVR4 | -4 | 4 | % | VDD≥4.75V, -40°C to 85°C | 676 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | PPS | body RxyPPS | 277 |
CAD (KiCad official)
- Symbol:
PIC18F25Q10-I - Footprint:
Package_DFN_QFN:QFN-28-1EP_6x6mm_P0.65mm_EP4.8x4.8mm - 3D model: QFN-28-EP(6x6) (KiCad packages3D, STEP)
- 3D model files:
pic18f25q10-i-etched.step/pic18f25q10-i-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pic18f25q10-i.step/pic18f25q10-i.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (725 pp, sha256
16d65da394f8f70c, retrieved 2026-10-23, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).