component
PIC18F25K83T-I
Public Made by Adomby adom
Microchip Tech Microcontroller Units (MCUs/MPUs/SOCs), SSOP-28-208mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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PIC18F25K83T-I
Microchip Tech · Microcontroller Units (MCUs/MPUs/SOCs) · SSOP-28-208mil
PIC18F25K83T-I from Microchip Tech, in a SSOP-28-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VPP/MCLR/RE3 | input | Master Clear reset input and programming voltage (VPP) pin, which is also the input-only port pin RE3 when MCLR is disabled. |
| 2 | RA0 | bidirectional | PORTA bit 0 general-purpose I/O pin, with analog input capability. |
| 3 | RA1 | bidirectional | PORTA bit 1 general-purpose I/O pin, with analog input capability. |
| 4 | RA2 | bidirectional | PORTA bit 2 general-purpose I/O pin, with analog input capability. |
| 5 | RA3 | bidirectional | PORTA bit 3 general-purpose I/O pin, with analog input capability. |
| 6 | RA4 | bidirectional | PORTA bit 4 general-purpose I/O pin, with analog input capability. |
| 7 | RA5 | bidirectional | PORTA bit 5 general-purpose I/O pin, with analog input capability. |
| 8 | VSS | power_in | Ground reference; all VDD and VSS pins must always be connected. |
| 9 | RA7 | bidirectional | PORTA bit 7 general-purpose I/O pin, which can also serve as the OSC1/CLKIN oscillator pin. |
| 10 | RA6 | bidirectional | PORTA bit 6 general-purpose I/O pin, which can also serve as the OSC2/CLKOUT oscillator pin. |
| 11 | RC0 | bidirectional | PORTC bit 0 general-purpose I/O pin with interrupt-on-change. |
| 12 | RC1 | bidirectional | PORTC bit 1 general-purpose I/O pin with interrupt-on-change. |
| 13 | RC2 | bidirectional | PORTC bit 2 general-purpose I/O pin with interrupt-on-change. |
| 14 | RC3 | bidirectional | PORTC bit 3 general-purpose I/O pin with interrupt-on-change and an I2C-specific pad. |
| 15 | RC4 | bidirectional | PORTC bit 4 general-purpose I/O pin with interrupt-on-change and an I2C-specific pad. |
| 16 | RC5 | bidirectional | PORTC bit 5 general-purpose I/O pin with interrupt-on-change. |
| 17 | RC6 | bidirectional | PORTC bit 6 general-purpose I/O pin with interrupt-on-change. |
| 18 | RC7 | bidirectional | PORTC bit 7 general-purpose I/O pin with interrupt-on-change. |
| 19 | VSS | power_in | Ground reference; all VDD and VSS pins must always be connected. |
| 20 | VDD | power_in | Positive supply, 2.3V to 5.5V for PIC18F25K83, decoupled with a 0.1 uF ceramic capacitor placed close to the pin. |
| 21 | RB0 | bidirectional | PORTB bit 0 general-purpose I/O pin with interrupt-on-change. |
| 22 | RB1 | bidirectional | PORTB bit 1 general-purpose I/O pin with interrupt-on-change and an I2C-specific pad. |
| 23 | RB2 | bidirectional | PORTB bit 2 general-purpose I/O pin with interrupt-on-change and an I2C-specific pad. |
| 24 | RB3 | bidirectional | PORTB bit 3 general-purpose I/O pin with interrupt-on-change. |
| 25 | RB4 | bidirectional | PORTB bit 4 general-purpose I/O pin with interrupt-on-change. |
| 26 | RB5 | bidirectional | PORTB bit 5 general-purpose I/O pin with interrupt-on-change. |
| 27 | RB6/ICSPCLK | bidirectional | PORTB bit 6 I/O pin that is also the in-circuit serial programming and debug clock input (ICSPCLK). |
| 28 | RB7/ICSPDAT | bidirectional | PORTB bit 7 I/O pin that is also the bidirectional in-circuit serial programming and debug data pin (ICSPDAT). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SSOP-28-208mil |
| Category | Single Chip Microcomputer/Microcontroller |
| Pins | 28 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Voltage on VDD pin w.r.t. VSS (PIC18F) | VDD | -0.3 | 6.5 | V | PIC18F25/26K83 | 794 | |
| Voltage on MCLR pin w.r.t. VSS | -0.3 | 9 | V | 794 | |||
| Storage temperature | -65 | 150 | °C | 794 | |||
| Ambient temperature under bias | -40 | 125 | °C | 794 | |||
| Maximum current on VSS pin | 350 | mA | -40°C ≤ TA ≤ +85°C | 794 | |||
| Maximum current on VSS pin | 120 | mA | 85°C ≤ TA ≤ +125°C | 794 | |||
| Maximum current on VDD pin, 28-pin devices | 250 | mA | -40°C ≤ TA ≤ +85°C | 794 | |||
| Maximum current on VDD pin, 28-pin devices | 85 | mA | 85°C ≤ TA ≤ +125°C | 794 | |||
| Maximum current on any standard I/O pin | 50 | mA | 794 | ||||
| Clamp current | IK | 20 | mA | VPIN < 0 or VPIN > VDD | 794 | ||
| Total power dissipation | 800 | mW | 794 | ||||
| Operating supply voltage | VDD | 2.3 | 5.5 | V | FOSC ≤ 16 MHz | 797 | |
| Operating supply voltage | VDD | 2.5 | 5.5 | V | FOSC ≤ 32 MHz | 797 | |
| Operating supply voltage | VDD | 3 | 5.5 | V | FOSC ≤ 64 MHz | 797 | |
| Operating ambient temperature, industrial | TA | -40 | 85 | °C | Industrial temperature | 795 | |
| RAM data retention voltage | VDR | 1.7 | V | Device in Sleep mode | 797 | ||
| VDD rise rate for internal POR | SVDD | 0.05 | V/ms | BOR or LPBOR disabled | 797 | ||
| Supply current, XT = 4 MHz | IDDXT4 | 1004 | 1300 | µA | 3.0V | 799 | |
| Supply current, HFINTOSC = 16 MHz | IDDHFO16 | 4.1 | 5.1 | mA | 3.0V | 799 | |
| Supply current, HFINTOSC = 64 MHz | IDDHFOPLL | 16.7 | 19 | mA | 3.0V | 799 | |
| Supply current, HS+PLL = 64 MHz | IDDHSPLL64 | 14.8 | 20 | mA | 3.0V | 799 | |
| Supply current, IDLE mode, HFINTOSC = 16 MHz | IDDIDLE | 2.9 | 4.5 | mA | 3.0V | 799 | |
| Power-down current base | IPD | 0.4 | 2.5 | µA | 3.0V, max at +85°C (8 µA max at +125°C) | 800 | |
| Low-frequency internal oscillator/WDT power-down current | IPD_WDT | 1.1 | 3.3 | µA | 3.0V, max at +85°C (9 µA at +125°C) | 800 | |
| Brown-out Reset power-down current | IPD_BOR | 9.4 | 17 | µA | 3.0V, max at +85°C (21 µA at +125°C) | 800 | |
| Low-power BOR power-down current | IPD_LPBOR | 0.5 | 3 | µA | 3.0V, max at +85°C (9 µA at +125°C) | 800 | |
| Input low voltage, TTL buffer | VIL | 0.8 | V | 4.5V ≤ VDD ≤ 5.5V | 801 | ||
| Input high voltage, TTL buffer | VIH | 2 | V | 4.5V ≤ VDD ≤ 5.5V | 801 | ||
| Input low voltage, SMBus 2.0 | VIL | 0.8 | V | 2.7V ≤ VDD ≤ 5.5V | 801 | ||
| Input high voltage, SMBus 2.0 | VIH | 2.1 | V | 2.7V ≤ VDD ≤ 5.5V | 801 | ||
| Input leakage current, I/O ports | IIL | -125 | 125 | nA | VSS ≤ VPIN ≤ VDD, pin at high-impedance, 85°C | 801 | |
| Input leakage current, I/O ports | IIL | -1000 | 1000 | nA | VSS ≤ VPIN ≤ VDD, pin at high-impedance, 125°C | 801 | |
| Input leakage current, MCLR | IIL | -200 | 200 | nA | VSS ≤ VPIN ≤ VDD, pin at high-impedance, 85°C | 801 | |
| Weak pull-up current | IPUR | 25 | 120 | 200 | µA | VDD = 3.0V, VPIN = VSS | 801 |
| Output low voltage, I/O ports | VOL | 0.6 | V | IOL = 10.0mA, VDD = 3.0V | 801 | ||
| I/O pin capacitance | CIO | 5 | 50 | pF | All I/O pins | 801 | |
| Brown-out Reset voltage | VBOR | 2.7 | 2.85 | 3 | V | BORV = 00 | 811 |
| Brown-out Reset voltage | VBOR | 2.55 | 2.7 | 2.85 | V | BORV = 01 | 811 |
| Brown-out Reset voltage | VBOR | 2.3 | 2.45 | 2.6 | V | BORV = 10 | 811 |
| Low-power Brown-out Reset voltage | VLPBOR | 1.8 | 1.9 | 2.2 | V | 811 | |
| Data EEPROM byte erase and write cycle time | TD_BEW | 4 | 5 | ms | 802 | ||
| Self-timed row erase or write time | TP_REW | 2 | 2.5 | ms | 802 | ||
| Thermal resistance junction to ambient, 28-pin SSOP | θJA | 90 | °C/W | 28-pin SSOP package | 803 | ||
| Thermal resistance junction to case, 28-pin SSOP | θJC | 24 | °C/W | 28-pin SSOP package | 803 | ||
| Maximum junction temperature | TJMAX | 150 | °C | 803 | |||
| Secondary oscillator clock frequency | FSEC | 32.4 | 32.768 | 33.1 | kHz | 805 | |
| System clock frequency | FOSC | 64 | MHz | 805 | |||
| Instruction period | TCY | 62.5 | ns | 806 | |||
| PLL input frequency range | FPLLIN | 4 | 16 | MHz | VDD ≥ 2.5V | 808 | |
| PLL output frequency range | FPLLOUT | 16 | 64 | MHz | VDD ≥ 2.5V | 808 | |
| ADC integral error | EIL | -2 | 0.1 | 2 | LSb | ADCREF+ = 3.0V, ADCREF- = 0V | 812 |
| ADC differential error | EDL | -1 | 0.1 | 1 | LSb | ADCREF+ = 3.0V, ADCREF- = 0V | 812 |
| ADC offset error | EOFF | 0.5 | 6 | LSb | ADCREF+ = 3.0V, ADCREF- = 0V | 812 | |
| ADC gain error | EGN | -6 | 0.2 | 6 | LSb | ADCREF+ = 3.0V, ADCREF- = 0V | 812 |
| FVR 1x gain (1.024V) accuracy | VFVR1 | -4 | 4 | % | VDD ≥ 2.5V, -40°C to 85°C | 815 | |
| Comparator input offset voltage | VIOFF | -40 | 40 | mV | VICM = VDD/2 | 815 |
CAD (KiCad official)
- Symbol:
PIC18F25K83T-I - Footprint:
Package_SO:SSOP-28_5.3x10.2mm_P0.65mm - 3D model: SSOP-28-208mil (KiCad packages3D, STEP)
- 3D model files:
pic18f25k83t-i-etched.step/pic18f25k83t-i-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pic18f25k83t-i.step/pic18f25k83t-i.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (870 pp, sha256
c232365457565675, retrieved 2026-10-27, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).