component
PIC18F25K50-I
Public Made by Adomby adom
Microchip Tech Microcontroller Units (MCUs/MPUs/SOCs), SSOP-28-208mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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PIC18F25K50-I
Microchip Tech · Microcontroller Units (MCUs/MPUs/SOCs) · SSOP-28-208mil
PIC18F25K50-I from Microchip Tech, in a SSOP-28-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | MCLR/VPP/RE3 | input | Master clear reset, programming voltage VPP and RE3, which is digital input only with no output functionality. |
| 2 | RA0 | bidirectional | Port A bit 0 I/O, shared with analog input AN0 and comparator input C12IN0-. |
| 3 | RA1 | bidirectional | Port A bit 1 I/O, shared with AN1, comparator input C12IN1- and CTMU CTCMP. |
| 4 | RA2 | bidirectional | Port A bit 2 I/O, shared with AN2, comparator input C2IN+, VREF- and DACOUT. |
| 5 | RA3 | bidirectional | Port A bit 3 I/O, shared with AN3, comparator input C1IN+ and VREF+. |
| 6 | RA4 | bidirectional | Port A bit 4 I/O, shared with comparator output C1OUT, SR latch output SRQ and Timer0 clock input T0CKI. |
| 7 | RA5 | bidirectional | Port A bit 5 I/O, shared with AN4, comparator output C2OUT, SRNQ, LVDIN and MSSP SS. |
| 8 | VSS | power_in | Ground reference for logic and I/O pins. |
| 9 | RA7 | bidirectional | Port A bit 7 I/O, shared with oscillator input OSC1 and external clock input CLKI. |
| 10 | RA6 | bidirectional | Port A bit 6 I/O, shared with oscillator output OSC2 and CLKO. |
| 11 | RC0 | bidirectional | Port C bit 0 I/O, shared with SOSCO, Timer1 clock T1CKI, T3CKI, T3G and interrupt-on-change IOCC0. |
| 12 | RC1 | bidirectional | Port C bit 1 I/O, shared with CCP2, SOSCI and interrupt-on-change IOCC1. |
| 13 | RC2 | bidirectional | Port C bit 2 I/O, shared with AN14, CTMU CTPLS, CCP1/P1A and interrupt-on-change IOCC2. |
| 14 | VUSB3V3 | power_out | USB 3.3V supply pin, also labelled VDDCORE in the pin summary. |
| 15 | RC4/D- | bidirectional | USB D- differential line; as RC4 it is digital input only with no output functionality, with interrupt-on-change IOCC4. |
| 16 | RC5/D+ | bidirectional | USB D+ differential line; as RC5 it is digital input only with no output functionality, with interrupt-on-change IOCC5. |
| 17 | RC6 | bidirectional | Port C bit 6 I/O, shared with AN18, EUSART TX/CK and interrupt-on-change IOCC6. |
| 18 | RC7 | bidirectional | Port C bit 7 I/O, shared with AN19, EUSART RX/DT, alternate SDO and interrupt-on-change IOCC7. |
| 19 | VSS | power_in | Ground reference for logic and I/O pins. |
| 20 | VDD | power_in | Positive supply; 2.3V to 5.5V for F devices and 1.8V to 3.6V for LF devices. |
| 21 | RB0 | bidirectional | Port B bit 0 I/O with weak pull-up, shared with AN12, SRI, FLT0, SDI/SDA and INT0. |
| 22 | RB1 | bidirectional | Port B bit 1 I/O with weak pull-up, shared with AN10, C12IN3-, P1C, SCK/SCL and INT1. |
| 23 | RB2 | bidirectional | Port B bit 2 I/O with weak pull-up, shared with AN8, CTED1, P1B and INT2. |
| 24 | RB3 | bidirectional | Port B bit 3 I/O with weak pull-up, shared with AN9, C12IN2-, CTED2, alternate CCP2 and SDO. |
| 25 | RB4 | bidirectional | Port B bit 4 I/O with weak pull-up, shared with AN11, P1D and interrupt-on-change IOCB4. |
| 26 | RB5 | bidirectional | Port B bit 5 I/O with weak pull-up, shared with AN13, T1G, alternate T3CKI and interrupt-on-change IOCB5. |
| 27 | RB6 | bidirectional | Port B bit 6 I/O with weak pull-up, shared with interrupt-on-change IOCB6 and programming clock PGC. |
| 28 | RB7 | bidirectional | Port B bit 7 I/O with weak pull-up, shared with interrupt-on-change IOCB7 and programming data PGD. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SSOP-28-208mil |
| Category | Single Chip Microcomputer/Microcontroller |
| Pins | 28 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating voltage range (F devices) | VDD | 2.3 | 5.5 | V | F devices | 1 | |
| Internal oscillator factory calibration accuracy | -1 | 1 | % | Factory calibrated | 1 | ||
| Flash program memory erase/write cycles | 10000 | cycles | Minimum | 1 | |||
| Flash data retention | 20 | years | 20-year data retention | 1 | |||
| Sleep mode current | 20 | nA | Sleep mode, typical | 1 | |||
| Watchdog Timer current | 300 | nA | Typical | 1 | |||
| Timer1 oscillator current | 800 | nA | @ 32 kHz | 1 |
CAD (KiCad official)
- Symbol:
PIC18F25K50-I - Footprint:
Package_SO:SSOP-28_5.3x10.2mm_P0.65mm - 3D model: SSOP-28-208mil (KiCad packages3D, STEP)
- 3D model files:
pic18f25k50-i-etched.step/pic18f25k50-i-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pic18f25k50-i.step/pic18f25k50-i.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (10 pp, sha256
22d4b8b8ff6ad4e4, retrieved 2026-10-27, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# PIC18F25K50-I
**Microchip Tech** · Microcontroller Units (MCUs/MPUs/SOCs) · SSOP-28-208mil
PIC18F25K50-I from Microchip Tech, in a SSOP-28-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | MCLR/VPP/RE3 | input | Master clear reset, programming voltage VPP and RE3, which is digital input only with no output functionality. |
| 2 | RA0 | bidirectional | Port A bit 0 I/O, shared with analog input AN0 and comparator input C12IN0-. |
| 3 | RA1 | bidirectional | Port A bit 1 I/O, shared with AN1, comparator input C12IN1- and CTMU CTCMP. |
| 4 | RA2 | bidirectional | Port A bit 2 I/O, shared with AN2, comparator input C2IN+, VREF- and DACOUT. |
| 5 | RA3 | bidirectional | Port A bit 3 I/O, shared with AN3, comparator input C1IN+ and VREF+. |
| 6 | RA4 | bidirectional | Port A bit 4 I/O, shared with comparator output C1OUT, SR latch output SRQ and Timer0 clock input T0CKI. |
| 7 | RA5 | bidirectional | Port A bit 5 I/O, shared with AN4, comparator output C2OUT, SRNQ, LVDIN and MSSP SS. |
| 8 | VSS | power_in | Ground reference for logic and I/O pins. |
| 9 | RA7 | bidirectional | Port A bit 7 I/O, shared with oscillator input OSC1 and external clock input CLKI. |
| 10 | RA6 | bidirectional | Port A bit 6 I/O, shared with oscillator output OSC2 and CLKO. |
| 11 | RC0 | bidirectional | Port C bit 0 I/O, shared with SOSCO, Timer1 clock T1CKI, T3CKI, T3G and interrupt-on-change IOCC0. |
| 12 | RC1 | bidirectional | Port C bit 1 I/O, shared with CCP2, SOSCI and interrupt-on-change IOCC1. |
| 13 | RC2 | bidirectional | Port C bit 2 I/O, shared with AN14, CTMU CTPLS, CCP1/P1A and interrupt-on-change IOCC2. |
| 14 | VUSB3V3 | power_out | USB 3.3V supply pin, also labelled VDDCORE in the pin summary. |
| 15 | RC4/D- | bidirectional | USB D- differential line; as RC4 it is digital input only with no output functionality, with interrupt-on-change IOCC4. |
| 16 | RC5/D+ | bidirectional | USB D+ differential line; as RC5 it is digital input only with no output functionality, with interrupt-on-change IOCC5. |
| 17 | RC6 | bidirectional | Port C bit 6 I/O, shared with AN18, EUSART TX/CK and interrupt-on-change IOCC6. |
| 18 | RC7 | bidirectional | Port C bit 7 I/O, shared with AN19, EUSART RX/DT, alternate SDO and interrupt-on-change IOCC7. |
| 19 | VSS | power_in | Ground reference for logic and I/O pins. |
| 20 | VDD | power_in | Positive supply; 2.3V to 5.5V for F devices and 1.8V to 3.6V for LF devices. |
| 21 | RB0 | bidirectional | Port B bit 0 I/O with weak pull-up, shared with AN12, SRI, FLT0, SDI/SDA and INT0. |
| 22 | RB1 | bidirectional | Port B bit 1 I/O with weak pull-up, shared with AN10, C12IN3-, P1C, SCK/SCL and INT1. |
| 23 | RB2 | bidirectional | Port B bit 2 I/O with weak pull-up, shared with AN8, CTED1, P1B and INT2. |
| 24 | RB3 | bidirectional | Port B bit 3 I/O with weak pull-up, shared with AN9, C12IN2-, CTED2, alternate CCP2 and SDO. |
| 25 | RB4 | bidirectional | Port B bit 4 I/O with weak pull-up, shared with AN11, P1D and interrupt-on-change IOCB4. |
| 26 | RB5 | bidirectional | Port B bit 5 I/O with weak pull-up, shared with AN13, T1G, alternate T3CKI and interrupt-on-change IOCB5. |
| 27 | RB6 | bidirectional | Port B bit 6 I/O with weak pull-up, shared with interrupt-on-change IOCB6 and programming clock PGC. |
| 28 | RB7 | bidirectional | Port B bit 7 I/O with weak pull-up, shared with interrupt-on-change IOCB7 and programming data PGD. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SSOP-28-208mil |
| Category | Single Chip Microcomputer/Microcontroller |
| Pins | 28 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating voltage range (F devices) | VDD | 2.3 | | 5.5 | V | F devices | 1 |
| Internal oscillator factory calibration accuracy | | -1 | | 1 | % | Factory calibrated | 1 |
| Flash program memory erase/write cycles | | 10000 | | | cycles | Minimum | 1 |
| Flash data retention | | 20 | | | years | 20-year data retention | 1 |
| Sleep mode current | | | 20 | | nA | Sleep mode, typical | 1 |
| Watchdog Timer current | | | 300 | | nA | Typical | 1 |
| Timer1 oscillator current | | | 800 | | nA | @ 32 kHz | 1 |
## CAD (KiCad official)
- Symbol: `PIC18F25K50-I`
- Footprint: `Package_SO:SSOP-28_5.3x10.2mm_P0.65mm`
- 3D model: SSOP-28-208mil (KiCad packages3D, STEP)
- 3D model files: `pic18f25k50-i-etched.step` / `pic18f25k50-i-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `pic18f25k50-i.step` / `pic18f25k50-i.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Microchip Tech datasheet](https://ww1.microchip.com/downloads/en/DeviceDoc/30025A.pdf) (10 pp, sha256 `22d4b8b8ff6ad4e4`, retrieved 2026-10-27, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/pic18f25k50-i-datasheet.pdf)