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PIC18F25K22T-I

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Microchip Tech Microcontroller Units (MCUs/MPUs/SOCs), SOIC-28-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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PIC18F25K22T-I

Microchip Tech · Microcontroller Units (MCUs/MPUs/SOCs) · SOIC-28-300mil

PIC18F25K22T-I from Microchip Tech, in a SOIC-28-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 RE3/VPP/MCLR input Input-only digital pin RE3 (when MCLRE=0), active-low Master Clear (device Reset) input, and programming voltage input VPP.
2 RA0/C12IN0-/AN0 bidirectional Digital I/O (TTL) PORTA bit 0, also Comparators C1/C2 inverting input C12IN0- and analog input AN0.
3 RA1/C12IN1-/AN1 bidirectional Digital I/O (TTL) PORTA bit 1, also Comparators C1/C2 inverting input C12IN1- and analog input AN1.
4 RA2/C2IN+/AN2/DACOUT/VREF- bidirectional Digital I/O (TTL) PORTA bit 2, also Comparator C2 noninverting input, analog input AN2, DAC reference output DACOUT and A/D low reference voltage input VREF-.
5 RA3/C1IN+/AN3/VREF+ bidirectional Digital I/O (TTL) PORTA bit 3, also Comparator C1 noninverting input, analog input AN3 and A/D high reference voltage input VREF+.
6 RA4/CCP5/C1OUT/SRQ/T0CKI bidirectional Digital I/O (Schmitt Trigger) PORTA bit 4, also CCP5 capture/compare/PWM, Comparator C1 output, SR latch Q output and Timer0 external clock input T0CKI.
7 RA5/C2OUT/SRNQ/SS1/HLVDIN/AN4 bidirectional Digital I/O (TTL) PORTA bit 5, also Comparator C2 output, SR latch output SRNQ, SPI client select SS1, High/Low-Voltage Detect input HLVDIN and analog input AN4.
8 VSS power_in Ground reference for logic and I/O pins.
9 RA7/CLKI/OSC1 bidirectional Digital I/O (TTL) PORTA bit 7, also external clock source input CLKI and oscillator crystal input OSC1.
10 RA6/CLKO/OSC2 bidirectional Digital I/O (TTL) PORTA bit 6, also CLKO (FOSC/4 output in RC mode) and oscillator crystal output OSC2.
11 RC0/P2B/T3CKI/T3G/T1CKI/SOSCO bidirectional Digital I/O (Schmitt Trigger) PORTC bit 0, also Enhanced CCP2 PWM output P2B (alternate), Timer3 clock input T3CKI, Timer3 gate T3G, Timer1 clock input T1CKI and secondary oscillator output SOSCO.
12 RC1/P2A/CCP2/SOSCI bidirectional Digital I/O (Schmitt Trigger) PORTC bit 1, also Enhanced CCP2 PWM output P2A, CCP2 capture/compare/PWM and secondary oscillator input SOSCI.
13 RC2/CTPLS/P1A/CCP1/T5CKI/AN14 bidirectional Digital I/O (Schmitt Trigger) PORTC bit 2, also CTMU pulse generator output CTPLS, Enhanced CCP1 PWM output P1A, CCP1, Timer5 clock input T5CKI and analog input AN14.
14 RC3/SCK1/SCL1/AN15 bidirectional Digital I/O (Schmitt Trigger) PORTC bit 3, also MSSP1 SPI clock SCK1, I2C clock SCL1 and analog input AN15.
15 RC4/SDI1/SDA1/AN16 bidirectional Digital I/O (Schmitt Trigger) PORTC bit 4, also MSSP1 SPI data in SDI1, I2C data SDA1 and analog input AN16.
16 RC5/SDO1/AN17 bidirectional Digital I/O (Schmitt Trigger) PORTC bit 5, also MSSP1 SPI data out SDO1 and analog input AN17.
17 RC6/P3A/CCP3/TX1/CK1/AN18 bidirectional Digital I/O (Schmitt Trigger) PORTC bit 6, also alternate P3A/CCP3, EUSART1 transmit TX1, synchronous clock CK1 and analog input AN18.
18 RC7/P3B/RX1/DT1/AN19 bidirectional Digital I/O (Schmitt Trigger) PORTC bit 7, also Enhanced CCP3 PWM output P3B, EUSART1 receive RX1, synchronous data DT1 and analog input AN19.
19 VSS power_in Ground reference for logic and I/O pins.
20 VDD power_in Positive supply for logic and I/O pins.
21 RB0/INT0/CCP4/FLT0/SRI/SS2/AN12 bidirectional Digital I/O (TTL) PORTB bit 0, also external interrupt INT0, CCP4, ECCP auto-shutdown fault input FLT0, SR latch input SRI, SPI client select SS2 and analog input AN12.
22 RB1/INT1/P1C/SCK2/SCL2/C12IN3-/AN10 bidirectional Digital I/O (TTL) PORTB bit 1, also external interrupt INT1, Enhanced CCP1 PWM output P1C, MSSP2 SPI clock SCK2, I2C clock SCL2, Comparator inverting input C12IN3- and analog input AN10.
23 RB2/INT2/CTED1/P1B/SDI2/SDA2/AN8 bidirectional Digital I/O (TTL) PORTB bit 2, also external interrupt INT2, CTMU Edge 1 input CTED1, Enhanced CCP1 PWM output P1B, MSSP2 SPI data in SDI2, I2C data SDA2 and analog input AN8.
24 RB3/CTED2/P2A/CCP2/SDO2/C12IN2-/AN9 bidirectional Digital I/O (TTL) PORTB bit 3, also CTMU Edge 2 input CTED2, Enhanced CCP2 PWM output P2A, CCP2 (alternate), MSSP2 SPI data out SDO2, Comparator inverting input C12IN2- and analog input AN9.
25 RB4/IOC0/P1D/T5G/AN11 bidirectional Digital I/O (TTL) PORTB bit 4 with interrupt-on-change IOC0, also Enhanced CCP1 PWM output P1D, Timer5 gate input T5G and analog input AN11.
26 RB5/IOC1/P2B/P3A/CCP3/T3CKI/T1G/AN13 bidirectional Digital I/O (TTL) PORTB bit 5 with interrupt-on-change IOC1, also P2B, P3A, CCP3 (default), T3CKI (alternate), Timer1 gate input T1G and analog input AN13.
27 RB6/IOC2/TX2/CK2/PGC bidirectional Digital I/O (TTL) PORTB bit 6 with interrupt-on-change IOC2, also EUSART2 transmit TX2, synchronous clock CK2 and In-Circuit Debugger/ICSP programming clock PGC.
28 RB7/IOC3/RX2/DT2/PGD bidirectional Digital I/O (TTL) PORTB bit 7 with interrupt-on-change IOC3, also EUSART2 receive RX2, synchronous data DT2 and In-Circuit Debugger/ICSP programming data PGD.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package SOIC-28-300mil
Category Single Chip Microcomputer/Microcontroller
Pins 28

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage PIC18F2X/4XK22 VDD 2.3 5.5 V PIC18F2X/4XK22 417
RAM Data Retention Voltage VDR 1.5 V 417
VDD Start Voltage to ensure internal Power-on Reset VPOR 0.7 V See section on Power-on Reset for details 417
VDD Rise Rate to ensure internal Power-on Reset SVDD 0.05 V/ms See section on Power-on Reset for details 417
Brown-out Reset Voltage BORV<1:0> = 11 VBOR 1.75 1.9 2.05 V BORV<1:0> = 11 417
Brown-out Reset Voltage BORV<1:0> = 10 VBOR 2.05 2.2 2.35 V BORV<1:0> = 10 417
Brown-out Reset Voltage BORV<1:0> = 01 VBOR 2.35 2.5 2.65 V BORV<1:0> = 01 417
Brown-out Reset Voltage BORV<1:0> = 00 VBOR 2.65 2.85 3.05 V BORV<1:0> = 00 417
Operating temperature TA -40 125 °C Standard Operating Conditions 417
Sleep mode power-down current (max +125°C) IPD 13 50 µA VDD = 5.0V, WDT, BOR, FVR and SOSC disabled, all peripherals inactive; typ at +25°C, max at +125°C 418
Sleep mode power-down current (max +85°C) IPD 13 35 µA VDD = 5.0V, WDT, BOR, FVR and SOSC disabled, all peripherals inactive; max at +85°C 418
Supply current RC_RUN LFINTOSC 31 kHz IDD 21 55 µA VDD = 5.0V, FOSC = 31 kHz, -40°C... +25°C row typ 21 max 55 420
Supply current RC_RUN MFINTOSC 500 kHz IDD 0.25 0.35 mA -40°C to +125°C, VDD = 5.0V, FOSC = 500 kHz 420
Supply current RC_RUN HFINTOSC 1 MHz IDD 0.55 0.75 mA -40°C to +125°C, VDD = 5.0V, FOSC = 1 MHz 421
Supply current RC_RUN HFINTOSC 16 MHz IDD 2.5 3.5 mA -40°C to +125°C, VDD = 5.0V, FOSC = 16 MHz 421
Supply current RC_RUN HFINTOSC+PLL 64 MHz IDD 6.8 9.5 mA -40°C to +125°C, VDD = 5.0V, FOSC = 64 MHz 421
Voltage on VDD with respect to VSS (PIC18(L)F26K22) VDD -0.3 6.5 V PIC18(L)F26K22 row as printed 414
Ambient temperature under bias -40 125 °C 414
Storage temperature -65 150 °C 414
Voltage on any pin with respect to VSS (except VDD and MCLR) -0.3 V max is VDD + 0.3V 414
Voltage on MCLR with respect to VSS 0 11 V Note 2 414
Total power dissipation 1 W Note 1 414
Maximum current out of VSS pin 300 mA -40°C to +85°C 414
Maximum current out of VSS pin 125 mA +85°C to +125°C 414
Maximum current into VDD pin 200 mA -40°C to +85°C 414
Maximum current into VDD pin 85 mA +85°C to +125°C 414
Input clamp current IIK 20 mA VI < 0 or VI > VDD 414
Output clamp current IOK 20 mA VO < 0 or VO > VDD 414
Maximum current sunk by all ports 200 mA -40°C to +85°C 414

CAD (KiCad official)

  • Symbol: PIC18F25K22T-I
  • Footprint: Package_SO:SOIC-28W_7.5x17.9mm_P1.27mm
  • 3D model: SOIC-28-300mil (KiCad packages3D, STEP)
  • 3D model files: pic18f25k22t-i-etched.step / pic18f25k22t-i-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pic18f25k22t-i.step / pic18f25k22t-i.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (539 pp, sha256 d0ba745eb6a13bdb, retrieved 2026-10-26, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF