PIC18F24Q10-I

{
  "slug": "pic18f24q10-i",
  "version": "0.1.0",
  "type": "component",
  "description": "Microchip Tech Microcontrollers (MCU/MPU/SOC), SSOP-28-208mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "embedded processors & controllers",
    "pic18f24q10-i",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
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    "path": "docs/hero.png"
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    "pic18f24q10-i.kicad_mod",
    "pic18f24q10-i.glb",
    "pic18f24q10-i.step",
    "pic18f24q10-i.lbr",
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    "docs/pic18f24q10-i-datasheet.pdf",
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    "pic18f24q10-i-hero.overlay.json",
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  "component": {
    "mpn": "PIC18F24Q10-I",
    "manufacturer": "Microchip Tech",
    "package": "SSOP-28-208mil",
    "pin_count": 28,
    "category": "Embedded Processors & Controllers",
    "subcategory": "Microcontrollers (MCU/MPU/SOC)",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590209561924558848",
    "parts": {
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      "footprint": "pic18f24q10-i.kicad_mod",
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      "lbr": "pic18f24q10-i.lbr"
    },
    "distributor_links": {
      "lcsc": "C641850"
    },
    "distributor_check": {
      "checked_at": "2026-10-18T02:37:38Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "no match"
      },
      "mouser": {
        "pn": null,
        "status": "no match"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "MCLR/VPP/RE3",
        "type": "input",
        "description": "Master Clear input that holds the device in Reset while low when MCLR is enabled, with an internal weak pull-up to VDD; it is input-only and RE3 is the read-only PORTE bit on this pin."
      },
      {
        "number": "2",
        "name": "RA0",
        "type": "bidirectional",
        "description": "PORTA digital I/O pin whose direction is set by TRISA and whose analog input mode is selected by ANSELA; peripheral functions are routed through PPS."
      },
      {
        "number": "3",
        "name": "RA1",
        "type": "bidirectional",
        "description": "PORTA digital I/O pin whose direction is set by TRISA and whose analog input mode is selected by ANSELA; peripheral functions are routed through PPS."
      },
      {
        "number": "4",
        "name": "RA2",
        "type": "bidirectional",
        "description": "PORTA digital I/O pin whose direction is set by TRISA and whose analog input mode is selected by ANSELA; peripheral functions are routed through PPS."
      },
      {
        "number": "5",
        "name": "RA3",
        "type": "bidirectional",
        "description": "PORTA digital I/O pin whose direction is set by TRISA and whose analog input mode is selected by ANSELA; peripheral functions are routed through PPS."
      },
      {
        "number": "6",
        "name": "RA4",
        "type": "bidirectional",
        "description": "PORTA digital I/O pin whose direction is set by TRISA and whose analog input mode is selected by ANSELA; peripheral functions are routed through PPS."
      },
      {
        "number": "7",
        "name": "RA5",
        "type": "bidirectional",
        "description": "PORTA digital I/O pin whose direction is set by TRISA and whose analog input mode is selected by ANSELA; peripheral functions are routed through PPS."
      },
      {
        "number": "8",
        "name": "VSS",
        "type": "power_in",
        "description": "Ground reference; all VSS pins must be connected and each VDD/VSS pair requires a decoupling capacitor."
      },
      {
        "number": "9",
        "name": "RA7",
        "type": "bidirectional",
        "description": "PORTA digital I/O pin whose direction is set by TRISA and whose analog input mode is selected by ANSELA; peripheral functions are routed through PPS."
      },
      {
        "number": "10",
        "name": "RA6",
        "type": "bidirectional",
        "description": "PORTA digital I/O pin whose direction is set by TRISA and whose analog input mode is selected by ANSELA; peripheral functions are routed through PPS."
      },
      {
        "number": "11",
        "name": "RC0",
        "type": "bidirectional",
        "description": "PORTC digital I/O pin whose direction is set by TRISC and whose analog input mode is selected by ANSELC; peripheral functions are routed through PPS."
      },
      {
        "number": "12",
        "name": "RC1",
        "type": "bidirectional",
        "description": "PORTC digital I/O pin whose direction is set by TRISC and whose analog input mode is selected by ANSELC; peripheral functions are routed through PPS."
      },
      {
        "number": "13",
        "name": "RC2",
        "type": "bidirectional",
        "description": "PORTC digital I/O pin whose direction is set by TRISC and whose analog input mode is selected by ANSELC; peripheral functions are routed through PPS."
      },
      {
        "number": "14",
        "name": "RC3",
        "type": "bidirectional",
        "description": "PORTC digital I/O pin whose direction is set by TRISC and whose analog input mode is selected by ANSELC; peripheral functions are routed through PPS."
      },
      {
        "number": "15",
        "name": "RC4",
        "type": "bidirectional",
        "description": "PORTC digital I/O pin whose direction is set by TRISC and whose analog input mode is selected by ANSELC; peripheral functions are routed through PPS."
      },
      {
        "number": "16",
        "name": "RC5",
        "type": "bidirectional",
        "description": "PORTC digital I/O pin whose direction is set by TRISC and whose analog input mode is selected by ANSELC; peripheral functions are routed through PPS."
      },
      {
        "number": "17",
        "name": "RC6",
        "type": "bidirectional",
        "description": "PORTC digital I/O pin whose direction is set by TRISC and whose analog input mode is selected by ANSELC; peripheral functions are routed through PPS."
      },
      {
        "number": "18",
        "name": "RC7",
        "type": "bidirectional",
        "description": "PORTC digital I/O pin whose direction is set by TRISC and whose analog input mode is selected by ANSELC; peripheral functions are routed through PPS."
      },
      {
        "number": "19",
        "name": "VSS",
        "type": "power_in",
        "description": "Ground reference; all VSS pins must be connected and each VDD/VSS pair requires a decoupling capacitor."
      },
      {
        "number": "20",
        "name": "VDD",
        "type": "power_in",
        "description": "Positive supply; all VDD pins must be connected and decoupled with a low-ESR ceramic capacitor, 0.1 µF (100 nF), 10-20V recommended."
      },
      {
        "number": "21",
        "name": "RB0",
        "type": "bidirectional",
        "description": "PORTB digital I/O pin whose direction is set by TRISB and whose analog input mode is selected by ANSELB; peripheral functions are routed through PPS."
      },
      {
        "number": "22",
        "name": "RB1",
        "type": "bidirectional",
        "description": "PORTB digital I/O pin whose direction is set by TRISB and whose analog input mode is selected by ANSELB; peripheral functions are routed through PPS."
      },
      {
        "number": "23",
        "name": "RB2",
        "type": "bidirectional",
        "description": "PORTB digital I/O pin whose direction is set by TRISB and whose analog input mode is selected by ANSELB; peripheral functions are routed through PPS."
      },
      {
        "number": "24",
        "name": "RB3",
        "type": "bidirectional",
        "description": "PORTB digital I/O pin whose direction is set by TRISB and whose analog input mode is selected by ANSELB; peripheral functions are routed through PPS."
      },
      {
        "number": "25",
        "name": "RB4",
        "type": "bidirectional",
        "description": "PORTB digital I/O pin whose direction is set by TRISB and whose analog input mode is selected by ANSELB; peripheral functions are routed through PPS."
      },
      {
        "number": "26",
        "name": "RB5",
        "type": "bidirectional",
        "description": "PORTB digital I/O pin whose direction is set by TRISB and whose analog input mode is selected by ANSELB; peripheral functions are routed through PPS."
      },
      {
        "number": "27",
        "name": "RB6/ICSPCLK",
        "type": "bidirectional",
        "description": "PORTB digital I/O pin that doubles as the ICSPCLK clock input for In-Circuit Serial Programming and debugging; keep the ICSP trace short and avoid pull-ups or series diodes on it."
      },
      {
        "number": "28",
        "name": "RB7/ICSPDAT",
        "type": "bidirectional",
        "description": "PORTB digital I/O pin that doubles as the ICSPDAT bidirectional serial data pin for In-Circuit Serial Programming and debugging; avoid pull-ups, series diodes or capacitors on it."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The pin map was taken from the garbled text extraction of Figure 1 (page 5), which is shared by the ; The excerpt does not give per-pin electrical limits or alternate-function assignments for the port p; The datasheet lists SSOP as a package for PIC18F24Q10 and PIC18F25Q10, but the excerpt does not map ",
          "24/28 pins cited to the wrong page (name found elsewhere): ['2:RA0@p220', '3:RA1@p220', '4:RA2@p220', '5:RA3@p220']"
        ],
        "pages_sent": 64,
        "cost_usd": 0.2508,
        "at": "2026-10-18T02:35:42"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590209561924558848",
        "pages": 725,
        "sha256": "e22ca20a7af480e3",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 28,
        "described": 28,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
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        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
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        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
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  }
}