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PIC16LF1507-I

Microchip Tech · Microcontroller Units (MCUs/MPUs/SOCs) · SSOP-20-208mil

PIC16LF1507-I from Microchip Tech, in a SSOP-20-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD power_in Positive supply; PIC16LF1507 operates from 1.8V to 3.6V.
2 RA5 bidirectional General purpose I/O with CLKIN (external clock input, EC mode), T1CKI Timer1 clock input and NCO1CLK input; interrupt-on-change and weak pull-up.
3 RA4 bidirectional General purpose I/O with AN3 A/D channel input, CLKOUT (FOSC/4 output) and T1G Timer1 gate input; interrupt-on-change and weak pull-up.
4 RA3 input Input-only pin shared with MCLR (Master Clear with internal pull-up), VPP programming voltage and CLC1IN0 logic cell input.
5 RC5 bidirectional General purpose I/O with PWM1 output, CLC1 output (alternate via APFCON) and CWG1A primary output.
6 RC4 bidirectional General purpose I/O with CLC2IN1 logic cell input and CWG1B complementary output.
7 RC3 bidirectional General purpose I/O with AN7 A/D channel input, PWM2 output and CLC2IN0 input.
8 RC6 bidirectional General purpose I/O with AN8 A/D channel input and NCO1 output (alternate via APFCON).
9 RC7 bidirectional General purpose I/O with AN9 A/D channel input and CLC1IN1 logic cell input.
10 RB7 bidirectional General purpose I/O with interrupt-on-change and weak pull-up.
11 RB6 bidirectional General purpose I/O with interrupt-on-change and weak pull-up.
12 RB5 bidirectional General purpose I/O with AN11 A/D channel input; interrupt-on-change and weak pull-up.
13 RB4 bidirectional General purpose I/O with AN10 A/D channel input; interrupt-on-change and weak pull-up.
14 RC2 bidirectional General purpose I/O with AN6 A/D channel input.
15 RC1 bidirectional General purpose I/O with AN5 A/D channel input, PWM4 output and NCO1 output (default pin).
16 RC0 bidirectional General purpose I/O with AN4 A/D channel input and CLC2 output.
17 RA2 bidirectional General purpose I/O with AN2, T0CKI Timer0 clock input, INT external interrupt, PWM3 output, CLC1 output (default) and CWG1FLT fault input.
18 RA1 bidirectional General purpose I/O with AN1 A/D channel input, VREF+ A/D positive reference input and ICSPCLK serial programming clock.
19 RA0 bidirectional General purpose I/O with AN0 A/D channel input and ICSPDAT ICSP data I/O.
20 VSS power_in Ground reference.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package SSOP-20-208mil
Category Single Chip Microcomputer/Microcontroller
Pins 20

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage on VDD pin (absolute max, PIC16LF1507) VDD -0.3 4 V with respect to VSS, PIC16LF1507 205
Voltage on MCLR pin -0.3 9 V with respect to VSS 205
Ambient temperature under bias -40 125 °C 205
Storage temperature -65 150 °C 205
Maximum current on VSS pin 250 mA -40°C ≤ TA ≤ +85°C 205
Maximum current on VDD pin 250 mA -40°C ≤ TA ≤ +85°C 205
Maximum current sunk by any standard I/O pin 50 mA 205
Maximum current sourced by any standard I/O pin 50 mA 205
Clamp current IK 20 mA VPIN < 0 or VPIN > VDD 205
Operating supply voltage VDD 1.8 3.6 V FOSC ≤ 16 MHz 208
Operating supply voltage VDD 2.5 3.6 V FOSC ≤ 20 MHz 208
Operating ambient temperature (industrial) TA -40 85 °C Industrial Temperature 206
RAM data retention voltage VDR 1.5 V Device in Sleep mode 208
Fixed voltage reference voltage 1x gain VFVR -4 4 % VDD ≥ 2.5V, -40°C ≤ TA ≤ +85°C 208
VDD rise rate SVDD 0.05 V/ms Ensures that the Power-on Reset signal is released properly. 208
Power-on Reset release voltage VPOR 1.6 V 208
Base IPD sleep current IPD 0.02 1 µA VDD=1.8V, WDT, BOR, FVR and SOSC disabled, all peripherals inactive; max at +85°C (8.0 at +125°C) 212
Base IPD sleep current IPD 0.025 2 µA VDD=3.0V, WDT, BOR, FVR and SOSC disabled, all peripherals inactive; max at +85°C (9.0 at +125°C) 212
Input low voltage, I/O port with TTL buffer VIL 0.8 V 4.5V ≤ VDD ≤ 5.5V 214
Input low voltage, I/O port VIL 0.15 V 1.8V ≤ VDD ≤ 4.5V, max is 0.15 VDD 214
Input low voltage MCLR VIL 0.2 V max is 0.2 VDD 214
Input high voltage, I/O port VIH 0.8 V 1.8V ≤ VDD ≤ 4.5V, min is 0.25 VDD + 0.8 214
Input high voltage MCLR VIH 0.8 V min is 0.8 VDD 214
Input leakage current, I/O ports IIL -125 5 125 nA VSS ≤ VPIN ≤ VDD, pin at high-impedance, 85°C 214
Input leakage current, MCLR IIL -200 50 200 nA VSS ≤ VPIN ≤ VDD, pin at high-impedance, 85°C 214
Weak pull-up current IPUR 25 100 200 µA VDD = 3.3V, VPIN = VSS 214
Output low voltage, I/O ports VOL 0.6 V IOL = 6 mA, VDD = 3.3V; IOL = 1.8 mA, VDD = 1.8V 214
Output high voltage, I/O ports VOH 0 V VDD - 0.7 min; IOH = 3 mA, VDD = 3.3V; IOH = 1 mA, VDD = 1.8V 214
Capacitive loading on output pins, all I/O CIO 50 pF 214
Brown-out Reset voltage VBOR 1.8 1.9 2.05 V BORV = 1 (PIC16LF1507) 221
Brown-out Reset voltage VBOR 2.55 2.7 2.85 V BORV = 0 221
Low-power BOR voltage VLPBOR 1.8 2.1 2.5 V LPBOR = 1 221
Brown-out Reset hysteresis VHYST 0 25 75 mV -40°C ≤ TA ≤ +85°C 221
Power-up timer period TPWRT 40 65 140 ms PWRTE = 0 221
Low-power watchdog timer time-out period TWDTLP 10 16 27 ms VDD = 3.3V-5V, 1:512 prescaler used 221
MCLR pulse width (low) TMCL 2 µs 221
External CLKIN frequency (ECH) FOSC 0 20 MHz External Clock (ECH) 217
ADC resolution NR 10 bit 224
ADC integral error EIL -1.7 1 1.7 LSb VREF = 3.0V 224
ADC offset error EOFF -2.5 1 2.5 LSb VREF = 3.0V 224
ADC gain error EGN -2 1 2 LSb VREF = 3.0V 224
ADC reference voltage VREF 1.8 V VREF = (VRPOS - VRNEG) 224
ADC clock period TAD 1 6 µs FOSC-based 226
Thermal resistance junction to ambient θJA 87.3 °C/W 20-pin SSOP package 215
Thermal resistance junction to case θJC 31.1 °C/W 20-pin SSOP package 215
Maximum junction temperature TJMAX 150 °C 215

CAD (KiCad official)

  • Symbol: PIC16LF1507-I
  • Footprint: Package_SO:SSOP-20_5.3x7.2mm_P0.65mm
  • 3D model: SSOP-20-208mil (KiCad packages3D, STEP)
  • 3D model files: pic16lf1507-i-etched.step / pic16lf1507-i-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pic16lf1507-i.step / pic16lf1507-i.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (278 pp, sha256 8e22411ac2125ee1, retrieved 2026-10-23, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF