# PIC16F690T-I

**Microchip Tech** · Microcontrollers (MCU/MPU/SOC) · SSOP-20-208mil

PIC16F690T-I from Microchip Tech, in a SSOP-20-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Positive supply; device operates from 2.0V to 5.5V. |
| 2 | RA5/T1CKI/OSC1/CLKIN | bidirectional | General purpose I/O with interrupt-on-change and weak pull-up, also Timer1 clock input, crystal/resonator OSC1, or external clock/RC oscillator input CLKIN. |
| 3 | RA4/AN3/T1G/OSC2/CLKOUT | bidirectional | General purpose I/O with interrupt-on-change and weak pull-up, also A/D channel 3 input, Timer1 gate input, crystal OSC2 or FOSC/4 CLKOUT output. |
| 4 | RA3/MCLR/VPP | input | General purpose input with interrupt-on-change, also Master Clear reset input with internal pull-up and high-voltage programming voltage VPP. |
| 5 | RC5/CCP1/P1A | bidirectional | General purpose I/O, also Capture/Compare input CCP1 or PWM output P1A. |
| 6 | RC4/C2OUT/P1B | bidirectional | General purpose I/O, also Comparator C2 output or PWM output P1B. |
| 7 | RC3/AN7/C12IN3-/P1C | bidirectional | General purpose I/O, also A/D channel 7 input, Comparator C1 or C2 negative input, or PWM output P1C. |
| 8 | RC6/AN8/SS | bidirectional | General purpose I/O, also A/D channel 8 input or SPI Slave Select input. |
| 9 | RC7/AN9/SDO | bidirectional | General purpose I/O, also A/D channel 9 input or SPI data output. |
| 10 | RB7/TX/CK | bidirectional | General purpose I/O with interrupt-on-change and weak pull-up, also EUSART asynchronous output TX or synchronous clock CK. |
| 11 | RB6/SCK/SCL | bidirectional | General purpose I/O with interrupt-on-change and weak pull-up, also SPI clock SCK or I2C clock SCL (open drain). |
| 12 | RB5/AN11/RX/DT | bidirectional | General purpose I/O with interrupt-on-change and weak pull-up, also A/D channel 11 input, EUSART asynchronous input RX or synchronous data DT. |
| 13 | RB4/AN10/SDI/SDA | bidirectional | General purpose I/O with interrupt-on-change and weak pull-up, also A/D channel 10 input, SPI data input SDI or I2C data SDA (open drain). |
| 14 | RC2/AN6/C12IN2-/P1D | bidirectional | General purpose I/O, also A/D channel 6 input, Comparator C1 or C2 negative input, or PWM output P1D. |
| 15 | RC1/AN5/C12IN1- | bidirectional | General purpose I/O, also A/D channel 5 input or Comparator C1 or C2 negative input. |
| 16 | RC0/AN4/C2IN+ | bidirectional | General purpose I/O, also A/D channel 4 input or Comparator C2 positive input. |
| 17 | RA2/AN2/T0CKI/INT/C1OUT | bidirectional | General purpose I/O with interrupt-on-change and weak pull-up, also A/D channel 2 input, Timer0 clock input, external interrupt INT or Comparator C1 output. |
| 18 | RA1/AN1/C12IN0-/VREF/ICSPCLK | bidirectional | General purpose I/O with interrupt-on-change and weak pull-up, also A/D channel 1 input, Comparator C1 or C2 negative input, external A/D voltage reference VREF or ICSP clock. |
| 19 | RA0/AN0/C1IN+/ICSPDAT/ULPWU | bidirectional | General purpose I/O with interrupt-on-change and weak pull-up, also A/D channel 0 input, Comparator C1 positive input, ICSP data I/O or Ultra Low-Power Wake-up input. |
| 20 | VSS | power_in | Ground reference. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SSOP-20-208mil |
| Category | Embedded Processors & Controllers |
| Pins | 20 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Voltage on VDD with respect to VSS | VDD | -0.3 |  | 6.5 | V |  | 225 |
| Voltage on MCLR with respect to VSS |  | -0.3 |  | 13.5 | V |  | 225 |
| Voltage on all other pins with respect to VSS |  | -0.3 |  |  | V | Upper limit printed as (VDD + 0.3V) | 225 |
| Maximum current out of VSS pin |  |  |  | 300 | mA |  | 225 |
| Maximum current into VDD pin |  |  |  | 250 | mA |  | 225 |
| Input clamp current | IIK |  |  | 20 | mA | VI < 0 or VI > VDD | 225 |
| Output clamp current | IOK |  |  | 20 | mA | Vo < 0 or Vo > VDD | 225 |
| Maximum output current sunk by any I/O pin |  |  |  | 25 | mA |  | 225 |
| Maximum output current sourced by any I/O pin |  |  |  | 25 | mA |  | 225 |
| Maximum current sunk by PORTA, PORTB and PORTC (combined) |  |  |  | 200 | mA |  | 225 |
| Maximum current sourced by PORTA, PORTB and PORTC (combined) |  |  |  | 200 | mA |  | 225 |
| Ambient temperature under bias | TA | -40 |  | 125 | °C |  | 225 |
| Storage temperature |  | -65 |  | 150 | °C |  | 225 |
| Operating temperature (industrial) | TA | -40 |  | 85 | °C | -40°C TA +85°C for industrial | 227 |
| Supply voltage VDD | VDD | 2 |  | 5.5 | V | FOSC <= 8 MHz: HFINTOSC, EC | 227 |
| Supply voltage VDD | VDD | 3 |  | 5.5 | V | FOSC <= 10 MHz | 227 |
| Supply voltage VDD | VDD | 4.5 |  | 5.5 | V | FOSC <= 20 MHz | 227 |
| RAM data retention voltage | VDR | 1.5 |  |  | V | Device in Sleep mode | 227 |
| VDD rise rate to ensure internal Power-on Reset signal | SVDD | 0.05 |  |  | V/ms | See Section 14.2.1 Power-on Reset (POR) | 227 |
| Supply current IDD, LP oscillator | IDD |  | 13 | 19 | µA | VDD 2.0 V; FOSC = 32 kHz | 228 |
| Supply current IDD, LP oscillator | IDD |  | 22 | 30 | µA | VDD 3.0 V; FOSC = 32 kHz | 228 |
| Supply current IDD, LP oscillator | IDD |  | 33 | 60 | µA | VDD 5.0 V; FOSC = 32 kHz | 228 |
| Supply current IDD, XT oscillator | IDD |  | 260 | 360 | µA | VDD 2.0 V; FOSC = 4 MHz | 228 |
| Supply current IDD, XT oscillator | IDD |  | 420 | 650 | µA | VDD 3.0 V; FOSC = 4 MHz | 228 |
| Supply current IDD, XT oscillator | IDD |  | 0.8 | 1.1 | mA | VDD 5.0 V; FOSC = 4 MHz | 228 |
| Supply current IDD, HFINTOSC | IDD |  | 410 | 650 | µA | VDD 2.0 V; FOSC = 8 MHz | 228 |
| Supply current IDD, HFINTOSC | IDD |  | 700 | 950 | µA | VDD 3.0 V; FOSC = 8 MHz | 228 |
| Supply current IDD, HFINTOSC | IDD |  | 1.3 | 1.65 | mA | VDD 5.0 V; FOSC = 8 MHz | 228 |
| Power-down base current IPD | IPD |  | 0.05 | 1.2 | µA | VDD 2.0 V; WDT, BOR, comparators, VREF and T1OSC disabled | 229 |
| Power-down base current IPD | IPD |  | 0.15 | 1.5 | µA | VDD 3.0 V; WDT, BOR, comparators, VREF and T1OSC disabled | 229 |
| Power-down base current IPD | IPD |  | 0.35 | 1.8 | µA | VDD 5.0 V; WDT, BOR, comparators, VREF and T1OSC disabled | 229 |
| WDT current |  |  | 1 | 2.2 | µA | VDD 2.0 V | 229 |
| WDT current |  |  | 2 | 4 | µA | VDD 3.0 V | 229 |
| WDT current |  |  | 3 | 7 | µA | VDD 5.0 V | 229 |
| BOR current |  |  | 42 | 60 | µA | VDD 3.0 V | 229 |
| BOR current |  |  | 85 | 122 | µA | VDD 5.0 V | 229 |
| Comparator current, both comparators enabled |  |  | 32 | 45 | µA | VDD 2.0 V | 229 |
| Comparator current, both comparators enabled |  |  | 120 | 160 | µA | VDD 5.0 V | 229 |
| T1OSC current, 32.768 kHz |  |  | 2 | 5 | µA | VDD 2.0 V | 229 |
| A/D current, no conversion in progress |  |  | 0.3 | 1.6 | µA | VDD 3.0 V | 229 |
| Input low voltage, I/O port with TTL buffer | VIL |  |  | 0.8 | V | I/O port with TTL buffer; 4.5V VDD 5.5V | 231 |
| Input low voltage, OSC1 (XT and LP modes) | VIL |  |  | 0.3 | V | OSC1 (XT and LP modes) | 231 |
| Input high voltage, I/O port with TTL buffer | VIH | 2 |  |  | V | I/O ports with TTL buffer; 4.5V VDD 5.5V | 231 |
| Input high voltage, OSC1 (XT and LP modes) | VIH | 1.6 |  |  | V | OSC1 (XT and LP modes) | 231 |
| Input leakage current, I/O ports | IIL |  | 0.1 | 1 | µA | VSS VPIN VDD; pin at high-impedance | 231 |
| Input leakage current, MCLR | IIL |  | 0.1 | 5 | µA | VSS VPIN VDD | 231 |
| Input leakage current, OSC1 | IIL |  | 0.1 | 5 | µA | VSS VPIN VDD; XT, HS and LP oscillator configuration | 231 |
| PORTA weak pull-up current | IPUR | 50 | 250 | 400 | µA | VDD = 5.0V, VPIN = VSS | 231 |
| Output low voltage, I/O ports | VOL |  |  | 0.6 | V | IOL = 8.5 mA, VDD = 4.5V (Ind.) | 231 |
| Internal calibrated HFINTOSC frequency, 1% tolerance | HFOSC | 7.92 | 8 | 8.08 | MHz | VDD = 3.5V, 25°C | 236 |
| Internal calibrated HFINTOSC frequency, 2% tolerance | HFOSC | 7.84 | 8 | 8.16 | MHz | 2.5V VDD 5.5V, 0°C TA +85°C | 236 |
| Internal calibrated HFINTOSC frequency, 5% tolerance | HFOSC | 7.6 | 8 | 8.4 | MHz | 2.0V VDD 5.5V, -40°C TA +85°C (Ind.) | 236 |
| Internal uncalibrated LFINTOSC frequency | LFOSC | 15 | 31 | 45 | kHz |  | 236 |
| Power-up timer period | TPWRT | 40 | 65 | 140 | ms |  | 239 |
| Watchdog timer time-out period (no prescaler) | TWDT | 10 | 17 | 25 | ms | VDD = 5V, -40°C to +85°C | 239 |
| Brown-out reset voltage | VBOR | 2 |  | 2.2 | V | (Note 4) | 239 |
| Thermal resistance junction to ambient, 20-pin SSOP package | JA |  | 108.1 |  | C/W | 20-pin SSOP package | 233 |
| Thermal resistance junction to case, 20-pin SSOP package | JC |  | 32.2 |  | C/W | 20-pin SSOP package | 233 |

## CAD (KiCad official)

- Symbol: `PIC16F690T-I`
- Footprint: `Package_SO:SSOP-20_5.3x7.2mm_P0.65mm`
- 3D model: SSOP-20-208mil (KiCad packages3D, STEP)
- 3D model files: `pic16f690t-i-etched.step` / `pic16f690t-i-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `pic16f690t-i.step` / `pic16f690t-i.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Microchip Tech datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586203702692208640) (298 pp, sha256 `e501369e180e27c1`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/pic16f690t-i-datasheet.pdf)