component
PIC16F506T-I
Public Made by Adomby adom
Microchip Tech Microcontrollers (MCU/MPU/SOC), SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
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| page.json | 7d ago |
| pic16f506t-i-etched.glb | 7d ago |
| pic16f506t-i-etched.step | 7d ago |
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| pic16f506t-i-hero.overlay.json | 7d ago |
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| pic16f506t-i.step | 7d ago |
| README.md | 7d ago |
PIC16F506T-I
Microchip Tech · Microcontrollers (MCU/MPU/SOC) · SOIC-14
PIC16F506T-I from Microchip Tech, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Positive supply for logic and I/O pins; device operates from 2.0V to 5.5V. |
| 2 | RB5/OSC1/CLKIN | bidirectional | Bidirectional I/O port RB5, also XTAL oscillator input (OSC1) or EXTRC/EC Schmitt Trigger clock input (CLKIN). |
| 3 | RB4/OSC2/CLKOUT | bidirectional | Bidirectional I/O port RB4 with software-programmable weak pull-up and wake-up on change, also XTAL oscillator output (OSC2) or EXTRC/INTOSC CLKOUT (FOSC/4). |
| 4 | RB3/MCLR/VPP | input | Input-only RB3 with optional weak pull-up and wake-up on change, or MCLR Schmitt Trigger reset input (weak pull-up always enabled) and high-voltage programming voltage input VPP. |
| 5 | RC5/T0CKI | bidirectional | Bidirectional I/O port RC5, also Timer0 clock input (Schmitt Trigger). |
| 6 | RC4/C2OUT | bidirectional | Bidirectional I/O port RC4, also Comparator 2 output (CMOS). |
| 7 | RC3 | bidirectional | Bidirectional I/O port RC3. |
| 8 | RC2/CVREF | bidirectional | Bidirectional I/O port RC2, also programmable voltage reference output CVREF (analog). |
| 9 | RC1/C2IN- | bidirectional | Bidirectional I/O port RC1, also Comparator 2 analog input C2IN-. |
| 10 | RC0/C2IN+ | bidirectional | Bidirectional I/O port RC0, also Comparator 2 analog input C2IN+. |
| 11 | RB2/AN2/C1OUT | bidirectional | Bidirectional I/O port RB2, also ADC channel input AN2 or Comparator 1 output C1OUT (CMOS). |
| 12 | RB1/AN1/C1IN-/ICSPCLK | bidirectional | Bidirectional I/O port RB1 with weak pull-up and wake-up on change, also ADC input AN1, Comparator 1 input C1IN-, and ICSP clock pin (Schmitt Trigger). |
| 13 | RB0/AN0/C1IN+/ICSPDAT | bidirectional | Bidirectional I/O port RB0 with weak pull-up and wake-up on change, also ADC input AN0, Comparator 1 input C1IN+, and ICSP data pin. |
| 14 | VSS | power_in | Ground reference for logic and I/O pins. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-14 |
| Category | Embedded Processors & Controllers |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating temperature (industrial) | TA | -40 | 85 | °C | Industrial | 86 | |
| Supply voltage | VDD | 2 | 5.5 | V | See Figure 14-1 | 86 | |
| WDT current | IWDT | 1 | 3 | μA | VDD = 2.0V | 86 | |
| Input high voltage, I/O ports with TTL buffer (printed max VDD) | VIH | 2 | V | 4.5 ≤ VDD ≤ 5.5V | 88 | ||
| Input leakage current, I/O ports | IIL | -1 | 1 | μA | VSS ≤ VPIN ≤ VDD, Pin at high-impedance | 88 | |
| Input leakage current, OSC1 | IIL | -5 | 5 | μA | VSS ≤ VPIN ≤ VDD, XT, HS and LP oscillator configuration | 88 | |
| Output low voltage, I/O ports/CLKOUT | VOL | 0.6 | V | IOL = 8.5 mA, VDD = 4.5V, -40°C to +85°C | 88 | ||
| Output low voltage, OSC2 | VOL | 0.6 | V | IOL = 1.6 mA, VDD = 4.5V, -40°C to +85°C | 88 | ||
| Capacitive loading, OSC2 pin | COSC2 | 15 | pF | In XT, HS and LP modes when external clock is used to drive OSC1. | 88 | ||
| Comparator input offset voltage | VOS | -10 | 10 | mV | (VDD - 1.5V)/2 | 89 | |
| Comparator common mode rejection ratio | CMRR | 55 | dB | 89 | |||
| Comparator response time | TRT | 150 | 400 | ns | Internal | 89 | |
| A/D integral error | EIL | -1.5 | 1.5 | LSb | VDD = 5.0V | 89 | |
| A/D offset error | EOFF | -1.5 | 1.5 | LSb | VDD = 5.0V | 89 | |
| A/D full-scale range | EFS | 2 | 5.5 | V | VDD | 89 | |
| Recommended impedance of analog voltage source | ZAIN | 10 | kΩ | 89 | |||
| A/D resolution | NR | 8 | bits | 89 |
CAD (KiCad official)
- Symbol:
PIC16F506T-I - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files:
pic16f506t-i-etched.step/pic16f506t-i-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pic16f506t-i.step/pic16f506t-i.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (124 pp, sha256
865d080fea3e6619, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).