main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 3d ago
viewers pic16f18855t-i: viewers · Ray 3d ago
package.json Publish 0.1.0 · Ray 3d ago
page.json Set visibility: public · Ray 3d ago
pic16f18855t-i-etched.glb Publish 0.1.0 · Ray 3d ago
pic16f18855t-i-etched.step pic16f18855t-i: factory component page (tier=lcsc) · Ray 3d ago
pic16f18855t-i-hero.glb pic16f18855t-i: hero GLB from the etched model (keeps the MPN mark) · Ray 3d ago
pic16f18855t-i-hero.overlay.json Publish 0.1.0 · Ray 3d ago
pic16f18855t-i.glb Publish 0.1.0 · Ray 3d ago
pic16f18855t-i.kicad_mod Publish 0.1.0 · Ray 3d ago
pic16f18855t-i.kicad_sym Publish 0.1.0 · Ray 3d ago
pic16f18855t-i.lbr Publish 0.1.0 · Ray 3d ago
pic16f18855t-i.step Publish 0.1.0 · Ray 3d ago
README.md Publish 0.1.0 · Ray 3d ago

PIC16F18855T-I

Microchip Tech · Microcontroller Units (MCUs/MPUs/SOCs) · SOIC-28-300mil

PIC16F18855T-I from Microchip Tech, in a SOIC-28-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VPP/MCLR/RE3 input Master clear input with internal weak pull-up when MCLR is enabled; RE3 is general purpose input only when MCLR is disabled by the Configuration bit, and VPP is the ICSP high-voltage programming mode entry input.
2 RA0 bidirectional General purpose I/O also serving as ADC channel A0 input, comparator negative input, CLC source input and interrupt-on-change input.
3 RA1 bidirectional General purpose I/O also serving as ADC channel A1 input, comparator negative input, CLC source input and interrupt-on-change input.
4 RA2 bidirectional General purpose I/O also serving as ADC channel A2 input, comparator positive input, external ADC/DAC negative reference VREF-, DAC1OUT1 output and interrupt-on-change input.
5 RA3 bidirectional General purpose I/O also serving as ADC channel A3 input, comparator positive input, external ADC/DAC positive reference VREF+, modular carrier input MDCARL and interrupt-on-change input.
6 RA4 bidirectional General purpose I/O also serving as ADC channel A4 input, modular carrier input MDCARH, Timer0 clock input T0CKI, CCP5 capture/compare/PWM and interrupt-on-change input.
7 RA5 bidirectional General purpose I/O also serving as ADC channel A5 input, MSSP1 SPI client select input SS1, modulator source input MDSRC and interrupt-on-change input.
8 VSS power_in Ground reference; all VSS and VDD pins must be connected at the circuit board level, since floating one may degrade electrical performance or cause non-functionality.
9 RA7 bidirectional General purpose I/O also serving as ADC channel A7 input, OSC1 crystal/resonator driver input (LP, XT, HS), external digital clock input CLKIN and interrupt-on-change input.
10 RA6 bidirectional General purpose I/O also serving as ADC channel A6 input, OSC2 crystal/resonator driver output (LP, XT, HS), FOSC/4 CLKOUT output in non-crystal modes and interrupt-on-change input.
11 RC0 bidirectional General purpose I/O also serving as ADC channel C0 input, Timer1/Timer3 clock and Timer3 gate inputs, SMT1 window input, interrupt-on-change input and 32.768 kHz secondary oscillator driver output SOSCO.
12 RC1 bidirectional General purpose I/O also serving as ADC channel C1 input, SMT1 signal input, CCP2 default capture input, interrupt-on-change input and 32.768 kHz secondary oscillator driver input SOSCI.
13 RC2 bidirectional General purpose I/O also serving as ADC channel C2 input, Timer5 external clock input T5CKI, CCP1 default capture input and interrupt-on-change input.
14 RC3 bidirectional General purpose I/O also serving as ADC channel C3 input, MSSP1 I2C clock SCL1 (I2C/SMBus levels), SPI clock SCK1, Timer2 external input T2IN and interrupt-on-change input.
15 RC4 bidirectional General purpose I/O also serving as ADC channel C4 input, MSSP1 I2C serial data SDA1 (I2C/SMBus levels), SPI data input SDI1 and interrupt-on-change input.
16 RC5 bidirectional General purpose I/O also serving as ADC channel C5 input, Timer4 external input T4IN and interrupt-on-change input.
17 RC6 bidirectional General purpose I/O also serving as ADC channel C6 input, EUSART synchronous mode clock CK input/output and interrupt-on-change input.
18 RC7 bidirectional General purpose I/O also serving as ADC channel C7 input, EUSART asynchronous receiver input RX, EUSART synchronous data DT input/output and interrupt-on-change input.
19 VSS power_in Ground reference; all VSS and VDD pins must be connected at the circuit board level, since floating one may degrade electrical performance or cause non-functionality.
20 VDD power_in Positive supply voltage input; all VDD and VSS pins must be connected at the circuit board level.
21 RB0 bidirectional General purpose I/O also serving as ADC channel B0 input, comparator C2IN1+ input, zero-cross detect input ZCD, external interrupt INT input, CCP4 default capture input and interrupt-on-change input.
22 RB1 bidirectional General purpose I/O also serving as ADC channel B1 input, comparator negative inputs C1IN3-/C2IN3-, MSSP2 I2C clock SCL2 (I2C/SMBus levels), SPI clock SCK2, CWG2 input CWG2IN and interrupt-on-change input.
23 RB2 bidirectional General purpose I/O also serving as ADC channel B2 input, MSSP2 I2C serial data SDA2 (I2C/SMBus levels), SPI data input SDI2, CWG3 input CWG3IN and interrupt-on-change input.
24 RB3 bidirectional General purpose I/O also serving as ADC channel B3 input, comparator negative inputs C1IN2-/C2IN2- and interrupt-on-change input.
25 RB4 bidirectional General purpose I/O also serving as ADC channel B4 input, ADC auto-conversion trigger ADCACT, Timer5 gate input T5G, SMT2 window input SMTWIN2 and interrupt-on-change input.
26 RB5 bidirectional General purpose I/O also serving as ADC channel B5 input, Timer1 gate input T1G, SMT2 signal input SMTSIG2, CCP3 default capture input and interrupt-on-change input.
27 RB6 bidirectional General purpose I/O also serving as ADC channel B6 input, CLC source input CLCIN2, interrupt-on-change input and ICSP clock input ICSPCLK.
28 RB7 bidirectional General purpose I/O also serving as ADC channel B7 input, DAC1OUT2 output, Timer6 external clock input T6IN, CLC source input CLCIN3, interrupt-on-change input and ICSP data input/output ICSPDAT.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package SOIC-28-300mil
Category Single Chip Microcomputer/Microcontroller
Pins 28

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Voltage on VDD pin with respect to VSS (PIC16F18855/75) VDD -0.3 6.5 V with respect to VSS 591
Voltage on MCLR pin with respect to VSS -0.3 9 V 591
Ambient temperature under bias -40 125 °C 591
Storage temperature -65 150 °C 591
Maximum current on VSS pin 350 mA -40°C ≤ TA ≤ +85°C 591
Maximum current on VSS pin 120 mA 85°C ≤ TA ≤ +125°C 591
Maximum current on VDD pin for 28-Pin devices 250 mA -40°C ≤ TA ≤ +85°C 591
Maximum current on VDD pin for 28-Pin devices 85 mA 85°C ≤ TA ≤ +125°C 591
Maximum current on any standard I/O pin 50 mA 591
Clamp current, IK (VPIN < 0 or VPIN > VDD) IK 20 mA VPIN < 0 or VPIN > VDD 591
Total power dissipation 800 mW 591
VDD operating supply voltage (PIC16F18855/75) VDDMIN 2.3 V Fosc ≤ 16 MHz 592
VDD operating supply voltage (PIC16F18855/75) VDDMIN 2.5 V Fosc ≤ 32 MHz 592
VDD operating supply voltage maximum VDDMAX 5.5 V 592
Operating ambient temperature range, industrial TA -40 85 °C 592
RAM Data Retention voltage VDR 1.7 V Device in Sleep mode 594
VDD Rise Rate to ensure internal Power-on Reset signal SVDD 0.05 V/ms BOR or LPBOR disabled 594
Supply current, XT = 4 MHz IDDXT4 450 700 µA VDD 3.0V 596
Supply current, HFINTOSC = 16 MHz IDDHFO16 1.9 2.7 mA VDD 3.0V 596
Supply current, HFINTOSC = 32 MHz IDDHFOPLL 2.7 4.25 mA VDD 3.0V 596
Supply current, HS+PLL = 32 MHz IDDHSPLL32 2.7 4.1 mA VDD 3.0V 596
Power-down current, IPD Base IPD 0.4 4 µA VREGPM = 1, VDD 3.0V, max +85°C 597
Power-down current, IPD Base IPD 0.4 12 µA VREGPM = 1, VDD 3.0V, max +125°C 597
Power-down current, Low-Frequency Internal Oscillator/WDT IPD_WDT 0.6 5 µA VREGPM = 1, VDD 3.0V, max +85°C 597
Power-down current, Low-Frequency Internal Oscillator/WDT IPD_WDT 0.6 13 µA VREGPM = 1, VDD 3.0V, max +125°C 597
Power-down current, Secondary Oscillator (SOSC) IPD_SOSC 0.8 8.5 µA VREGPM = 1, VDD 3.0V, max +85°C 597
Power-down current, Secondary Oscillator (SOSC) IPD_SOSC 0.8 15 µA VREGPM = 1, VDD 3.0V, max +125°C 597
Power-down current, FVR IPD_FVR 32 65 µA VREGPM = 1, VDD 3.0V, max +85°C 597
Power-down current, FVR IPD_FVR 32 80 µA VREGPM = 1, VDD 3.0V, max +125°C 597
Power-down current, Brown-out Reset (BOR) IPD_BOR 14 19 µA VREGPM = 1, VDD 3.0V, max +85°C 597
Power-down current, Brown-out Reset (BOR) IPD_BOR 14 21 µA VREGPM = 1, VDD 3.0V, max +125°C 597
Power-down current, Low-Power Brown-out Reset (LPBOR) IPD_LPBOR 0.7 5 µA VREGPM = 1, VDD 3.0V, max +85°C 597
Power-down current, Low-Power Brown-out Reset (LPBOR) IPD_LPBOR 0.7 13 µA VREGPM = 1, VDD 3.0V, max +125°C 597
Power-down current, Comparator IPD_CMP 31 47 µA VREGPM = 1, VDD 3.0V, max +85°C 597
Power-down current, Comparator IPD_CMP 31 50 µA VREGPM = 1, VDD 3.0V, max +125°C 597
Input low voltage, I/O port with TTL buffer VIL 0.8 V 4.5V ≤ VDD ≤ 5.5V 598
Input low voltage, I/O port (max = 0.15 × VDD) VIL 0.15 × VDD 1.8V ≤ VDD ≤ 4.5V 598
Input low voltage, I/O port with Schmitt Trigger buffer (max = 0.2 × VDD) VIL 0.2 × VDD 2.0V ≤ VDD ≤ 5.5V 598
Input low voltage, I/O port with I2C levels (max = 0.3 × VDD) VIL 0.3 × VDD 598
Input low voltage, I/O port with SMBus levels VIL 0.8 V 2.7V ≤ VDD ≤ 5.5V 598
Input low voltage, MCLR (max = 0.2 × VDD) VIL 0.2 × VDD 598
Input high voltage, I/O port with TTL buffer VIH 2 V 4.5V ≤ VDD ≤ 5.5V 598
Input high voltage, I/O port with Schmitt Trigger buffer (min = 0.8 × VDD) VIH 0.8 × VDD 2.0V ≤ VDD ≤ 5.5V 598
Input high voltage, I/O port with I2C levels (min = 0.7 × VDD) VIH 0.7 × VDD 598
Input high voltage, I/O port with SMBus levels VIH 2.1 V 2.7V ≤ VDD ≤ 5.5V 598
Input high voltage, MCLR (min = 0.7 × VDD) VIH 0.7 × VDD 598
Input leakage current, I/O ports IIL -125 5 125 nA VSS ≤ VPIN ≤ VDD, pin at high-impedance, 85°C 598
Input leakage current, I/O ports IIL -1000 5 1000 nA VSS ≤ VPIN ≤ VDD, pin at high-impedance, 125°C 598
Input leakage current, MCLR IIL -200 50 200 nA VSS ≤ VPIN ≤ VDD, pin at high-impedance, 85°C 598
Weak pull-up current IPUR 25 120 200 µA VDD = 3.0V, VPIN = VSS 598
Output low voltage, I/O ports VOL 0.6 V IOL = 10.0mA, VDD = 3.0V 598
Pin capacitance, all I/O pins CIO 5 50 pF 598
Voltage on MCLR/VPP pin to enter programming mode VIHH 8 9 V Note 2, Note 3 599
System clock frequency (FOSC) FOSC 32 MHz Note 2, Note 3 602
Brown-out Reset voltage VBOR 2.55 2.7 2.85 V BORV = 0 608
Brown-out Reset voltage VBOR 2.3 2.45 2.6 V BORV = 1 (PIC16F18855/75) 608
Low-Power Brown-out Reset voltage VLPBOR 1.8 2.7 V 608
Thermal resistance junction to ambient, 28-pin SOIC θJA 80 °C/W 28-pin SOIC package 600
Thermal resistance junction to case, 28-pin SOIC θJC 24 °C/W 28-pin SOIC package 600
Maximum junction temperature TJMAX 150 °C 600

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing PPS body RxyPPS 395

CAD (KiCad official)

  • Symbol: PIC16F18855T-I
  • Footprint: Package_SO:SOIC-28W_7.5x17.9mm_P1.27mm
  • 3D model: SOIC-28-300mil (KiCad packages3D, STEP)
  • 3D model files: pic16f18855t-i-etched.step / pic16f18855t-i-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pic16f18855t-i.step / pic16f18855t-i.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (673 pp, sha256 d61c614d646362d9, retrieved 2026-10-25, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF