PIC16F18313-E

{
  "slug": "pic16f18313-e",
  "version": "0.1.0",
  "type": "component",
  "description": "Microchip Tech MICROCHIP, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "embedded processors & controllers",
    "pic16f18313-e",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "pic16f18313-e.kicad_sym",
    "pic16f18313-e.kicad_mod",
    "pic16f18313-e.glb",
    "pic16f18313-e.step",
    "pic16f18313-e.lbr",
    "docs/hero.png",
    "docs/pic16f18313-e-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "pic16f18313-e-hero.glb",
    "pic16f18313-e-hero.overlay.json",
    "pic16f18313-e-etched.glb"
  ],
  "component": {
    "mpn": "PIC16F18313-E",
    "manufacturer": "Microchip Tech",
    "package": "SOIC-8",
    "pin_count": 8,
    "category": "Embedded Processors & Controllers",
    "subcategory": "MICROCHIP",
    "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/176d502e0de94dfc85ddb3eb5bfd8ea8.pdf",
    "parts": {
      "symbol": "pic16f18313-e.kicad_sym",
      "footprint": "pic16f18313-e.kicad_mod",
      "model_3d": "pic16f18313-e-hero.glb",
      "model_3d_plain": "pic16f18313-e-etched.glb",
      "model_3d_step": "pic16f18313-e-etched.step",
      "model_3d_step_plain": "pic16f18313-e.step",
      "lbr": "pic16f18313-e.lbr"
    },
    "distributor_links": {
      "lcsc": "C145756"
    },
    "distributor_check": {
      "checked_at": "2026-10-23T18:33:25Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "deferred",
        "error": "shared DigiKey quota guard: 870 calls left today"
      },
      "mouser": {
        "pn": null,
        "status": "quota"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "VDD",
        "type": "power_in",
        "description": "Positive supply, 2.3V to 5.5V for PIC16F18313; must always be connected and decoupled with a 0.1 µF ceramic capacitor placed close to the pin."
      },
      {
        "number": "2",
        "name": "RA5",
        "type": "bidirectional",
        "description": "General purpose I/O RA5 (TTL/ST input, CMOS output) multiplexed with ANA5, MDCIN2, T1CKI, SOSCIN/SOSCI, CLCIN1, CCP1/CCP2 inputs and OSC1/CLKIN."
      },
      {
        "number": "3",
        "name": "RA4",
        "type": "bidirectional",
        "description": "General purpose I/O RA4 (TTL/ST input, CMOS output) multiplexed with ANA4, C1IN1-, T1G, SOSCO, OSC2 and CLKOUT (FOSC/4 output)."
      },
      {
        "number": "4",
        "name": "RA3/MCLR/VPP",
        "type": "input",
        "description": "Input-only RA3 that also serves as Master Clear (with internal weak pull-up) and VPP programming voltage input, plus SS1 and CLCIN0 inputs."
      },
      {
        "number": "5",
        "name": "RA2",
        "type": "bidirectional",
        "description": "General purpose I/O RA2 (TTL/ST input, CMOS output) multiplexed with ANA2, VREF-, DAC1REF-, SDI1, SDA1 (I2C open-drain), T0CKI, CWG1IN and INT."
      },
      {
        "number": "6",
        "name": "RA1/ICSPCLK",
        "type": "bidirectional",
        "description": "General purpose I/O RA1 multiplexed with ANA1, VREF+, C1IN0-, DAC1REF+, SCK1/SCL1, RX, MDMIN, CLCIN2 and the ICSPCLK/ICDCLK programming and debug clock."
      },
      {
        "number": "7",
        "name": "RA0/ICSPDAT",
        "type": "bidirectional",
        "description": "General purpose I/O RA0 multiplexed with ANA0, C1IN0+, DAC1OUT, CLCIN3, MDCIN1 and the ICSPDAT/ICDDAT programming and debug data I/O."
      },
      {
        "number": "8",
        "name": "VSS",
        "type": "power_in",
        "description": "Ground reference; must always be connected."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-sonnet-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Datasheet Table 1-2 labels the RA2 ANA2 function as 'ADC Channel A3 input', which conflicts with the; The pin numbering comes from the 8-pin PDIP/SOIC/UDFN diagram (Figure 1) and Table 1. The datasheet ; The VDD range of 2.3V to 5.5V applies to the F (non-LF) device. The datasheet gives 1.8V to 3.6V for",
          "2/8 pins cited to the wrong page (name found elsewhere): ['6:RA1/ICSPCLK@p11', '7:RA0/ICSPDAT@p11']"
        ],
        "pages_sent": 55,
        "cost_usd": 0.2813,
        "at": "2026-10-23T18:33:15"
      },
      "datasheet": {
        "url": "https://datasheet.lcsc.com/datasheet/pdf/176d502e0de94dfc85ddb3eb5bfd8ea8.pdf",
        "pages": 471,
        "sha256": "66141e8bb0bb92ef",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 8,
        "described": 8,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "pic16f18313-e.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
        "checked": "2026-10-23",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "pic16f18313-e-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "c992bb432825a77ada11d5a5d320f8a0d61e37926ef2cc490c031450d2947327",
        "checked": "2026-10-23",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}