component
PIC16F18313-E
Public Made by Adomby adom
Microchip Tech MICROCHIP, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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PIC16F18313-E
Microchip Tech · MICROCHIP · SOIC-8
PIC16F18313-E from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Positive supply, 2.3V to 5.5V for PIC16F18313; must always be connected and decoupled with a 0.1 µF ceramic capacitor placed close to the pin. |
| 2 | RA5 | bidirectional | General purpose I/O RA5 (TTL/ST input, CMOS output) multiplexed with ANA5, MDCIN2, T1CKI, SOSCIN/SOSCI, CLCIN1, CCP1/CCP2 inputs and OSC1/CLKIN. |
| 3 | RA4 | bidirectional | General purpose I/O RA4 (TTL/ST input, CMOS output) multiplexed with ANA4, C1IN1-, T1G, SOSCO, OSC2 and CLKOUT (FOSC/4 output). |
| 4 | RA3/MCLR/VPP | input | Input-only RA3 that also serves as Master Clear (with internal weak pull-up) and VPP programming voltage input, plus SS1 and CLCIN0 inputs. |
| 5 | RA2 | bidirectional | General purpose I/O RA2 (TTL/ST input, CMOS output) multiplexed with ANA2, VREF-, DAC1REF-, SDI1, SDA1 (I2C open-drain), T0CKI, CWG1IN and INT. |
| 6 | RA1/ICSPCLK | bidirectional | General purpose I/O RA1 multiplexed with ANA1, VREF+, C1IN0-, DAC1REF+, SCK1/SCL1, RX, MDMIN, CLCIN2 and the ICSPCLK/ICDCLK programming and debug clock. |
| 7 | RA0/ICSPDAT | bidirectional | General purpose I/O RA0 multiplexed with ANA0, C1IN0+, DAC1OUT, CLCIN3, MDCIN1 and the ICSPDAT/ICDDAT programming and debug data I/O. |
| 8 | VSS | power_in | Ground reference; must always be connected. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-8 |
| Category | Embedded Processors & Controllers |
| Pins | 8 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | PPS | BODY RxyPPS | 259 |
CAD (KiCad official)
- Symbol:
PIC16F18313-E - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
pic16f18313-e-etched.step/pic16f18313-e-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pic16f18313-e.step/pic16f18313-e.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (471 pp, sha256
66141e8bb0bb92ef, retrieved 2026-10-23, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# PIC16F18313-E
**Microchip Tech** · MICROCHIP · SOIC-8
PIC16F18313-E from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Positive supply, 2.3V to 5.5V for PIC16F18313; must always be connected and decoupled with a 0.1 µF ceramic capacitor placed close to the pin. |
| 2 | RA5 | bidirectional | General purpose I/O RA5 (TTL/ST input, CMOS output) multiplexed with ANA5, MDCIN2, T1CKI, SOSCIN/SOSCI, CLCIN1, CCP1/CCP2 inputs and OSC1/CLKIN. |
| 3 | RA4 | bidirectional | General purpose I/O RA4 (TTL/ST input, CMOS output) multiplexed with ANA4, C1IN1-, T1G, SOSCO, OSC2 and CLKOUT (FOSC/4 output). |
| 4 | RA3/MCLR/VPP | input | Input-only RA3 that also serves as Master Clear (with internal weak pull-up) and VPP programming voltage input, plus SS1 and CLCIN0 inputs. |
| 5 | RA2 | bidirectional | General purpose I/O RA2 (TTL/ST input, CMOS output) multiplexed with ANA2, VREF-, DAC1REF-, SDI1, SDA1 (I2C open-drain), T0CKI, CWG1IN and INT. |
| 6 | RA1/ICSPCLK | bidirectional | General purpose I/O RA1 multiplexed with ANA1, VREF+, C1IN0-, DAC1REF+, SCK1/SCL1, RX, MDMIN, CLCIN2 and the ICSPCLK/ICDCLK programming and debug clock. |
| 7 | RA0/ICSPDAT | bidirectional | General purpose I/O RA0 multiplexed with ANA0, C1IN0+, DAC1OUT, CLCIN3, MDCIN1 and the ICSPDAT/ICDDAT programming and debug data I/O. |
| 8 | VSS | power_in | Ground reference; must always be connected. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-8 |
| Category | Embedded Processors & Controllers |
| Pins | 8 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | PPS | | BODY RxyPPS | 259 |
## CAD (KiCad official)
- Symbol: `PIC16F18313-E`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `pic16f18313-e-etched.step` / `pic16f18313-e-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `pic16f18313-e.step` / `pic16f18313-e.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Microchip Tech datasheet](docs/pic16f18313-e-datasheet.pdf) (471 pp, sha256 `66141e8bb0bb92ef`, retrieved 2026-10-23, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/pic16f18313-e-datasheet.pdf)