component
PIC16F1824T-I
Public Made by Adomby adom
Microchip Tech Microcontrollers (MCU/MPU/SOC), SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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PIC16F1824T-I
Microchip Tech · Microcontrollers (MCU/MPU/SOC) · SOIC-14
PIC16F1824T-I from Microchip Tech, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Positive supply; the PIC16F1824 operates from 1.8V to 5.5V. |
| 2 | RA5 | bidirectional | General purpose I/O with 25 mA high current sink/source; alternate functions include CLKIN/OSC1, T1OSI, T1CKI, P2A and CCP2 (CCP2/P2A location selectable via APFCON1). |
| 3 | RA4 | bidirectional | General purpose I/O; alternate functions include AN3, CPS3, OSC2/CLKOUT, T1OSO, CLKR, SDO, P2B and T1G, with CLKOUT taking output priority when enabled. |
| 4 | RA3 | input | General purpose input only; this pin is also MCLR (Master Clear with internal pull-up) and VPP (programming voltage). |
| 5 | RC5 | bidirectional | General purpose I/O; alternate functions include P1A, CCP1, RX/DT and MDCIN2. |
| 6 | RC4 | bidirectional | General purpose I/O; alternate functions include C2OUT, SRNQ, P1B, TX/CK and MDOUT. |
| 7 | RC3 | bidirectional | General purpose I/O; alternate functions include AN7, CPS7, C12IN3-, P2A, CCP2, P1C, SS and MDMIN. |
| 8 | RC2 | bidirectional | General purpose I/O; alternate functions include AN6, CPS6, C12IN2-, P1D, P2B, SDO and MDCIN1. |
| 9 | RC1 | bidirectional | General purpose I/O; alternate functions include AN5, CPS5, C12IN1-, SDA, SDI, P1C and CCP4. |
| 10 | RC0 | bidirectional | General purpose I/O; alternate functions include AN4, CPS4, C2IN+, SCL, SCK and P1D. |
| 11 | RA2 | bidirectional | General purpose I/O; alternate functions include AN2, CPS2, T0CKI, INT, C1OUT, SRQ, CCP3 and FLT0. |
| 12 | RA1 | bidirectional | General purpose I/O; alternate functions include AN1, CPS1, C12IN0-, VREF+, SRI, RX/DT and the ICSPCLK/ICDCLK programming clock. |
| 13 | RA0 | bidirectional | General purpose I/O; alternate functions include AN0, CPS0, C1IN+, VREF-, DACOUT, TX/CK and the ICSPDAT/ICDDAT programming data. |
| 14 | VSS | power_in | Ground reference. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-14 |
| Category | Embedded Processors & Controllers |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Voltage on VDD with respect to VSS, PIC16F1824/8 | -0.3 | 6.5 | V | 338 | |||
| Voltage on MCLR with respect to Vss | -0.3 | 9 | V | 338 | |||
| Maximum current out of VSS pin | 210 | mA | -40°C TA +85°C for industrial | 338 | |||
| Maximum current into VDD pin | 170 | mA | -40°C TA +85°C for industrial | 338 | |||
| Clamp current | IK | 20 | mA | VPIN < 0 or VPIN > VDD | 338 | ||
| Ambient temperature under bias | -40 | 125 | °C | 338 | |||
| Storage temperature | -65 | 150 | °C | 338 | |||
| VDD Supply Voltage (VDDMIN, VDDMAX), PIC16F1824/8 | VDD | 1.8 | 5.5 | V | FOSC ≤ 16 MHz | 341 | |
| VDD Supply Voltage (VDDMIN, VDDMAX), PIC16F1824/8 | VDD | 2.5 | 5.5 | V | FOSC ≤ 32 MHz (Note 2) | 341 | |
| RAM Data Retention Voltage, PIC16F1824/8 | VDR | 1.7 | V | Device in Sleep mode | 341 | ||
| Fixed Voltage Reference Voltage for ADC | VADFVR | -8 | 6 | % | 1.024V, VDD ≥ 2.5V | 341 | |
| Fixed Voltage Reference Voltage for Comparator and DAC | VCDAFVR | -11 | 7 | % | 1.024V, VDD ≥ 2.5V | 341 | |
| VDD Rise Rate to ensure internal Power-on Reset signal | SVDD | 0.05 | V/ms | 341 | |||
| Supply Current (IDD), LP oscillator mode | IDD | 24 | 50 | µA | VDD = 1.8V, FOSC = 32 kHz, LP Oscillator mode, -40°C TA +85°C | 343 | |
| Supply Current (IDD), LP oscillator mode | IDD | 30 | 55 | µA | VDD = 3.0V, FOSC = 32 kHz, LP Oscillator mode, -40°C TA +85°C | 343 | |
| Supply Current (IDD), LP oscillator mode | IDD | 32 | 60 | µA | VDD = 5.0V, FOSC = 32 kHz, LP Oscillator mode, -40°C TA +85°C | 343 | |
| Supply Current (IDD), LFINTOSC mode | IDD | 21 | 58 | µA | VDD = 1.8V, FOSC = 31 kHz, LFINTOSC mode, -40°C TA +85°C | 344 | |
| Supply Current (IDD), LFINTOSC mode | IDD | 27 | 65 | µA | VDD = 3.0V, FOSC = 31 kHz, LFINTOSC mode, -40°C TA +85°C | 344 | |
| Supply Current (IDD), LFINTOSC mode | IDD | 28 | 70 | µA | VDD = 5.0V, FOSC = 31 kHz, LFINTOSC mode, -40°C TA +85°C | 344 | |
| Supply Current (IDD), MFINTOSC mode | IDD | 124 | 180 | µA | VDD = 1.8V, FOSC = 500 kHz, MFINTOSC mode | 344 | |
| Supply Current (IDD), MFINTOSC mode | IDD | 150 | 210 | µA | VDD = 3.0V, FOSC = 500 kHz, MFINTOSC mode | 344 | |
| Supply Current (IDD), MFINTOSC mode | IDD | 190 | 270 | µA | VDD = 5.0V, FOSC = 500 kHz, MFINTOSC mode | 344 | |
| Supply Current (IDD), HFINTOSC mode | IDD | 0.48 | 0.75 | mA | VDD = 1.8V, FOSC = 8 MHz, HFINTOSC mode | 344 | |
| Supply Current (IDD), HFINTOSC mode | IDD | 0.74 | 1.15 | mA | VDD = 3.0V, FOSC = 8 MHz, HFINTOSC mode | 344 | |
| Supply Current (IDD), HFINTOSC mode | IDD | 0.82 | 1.35 | mA | VDD = 5.0V, FOSC = 8 MHz, HFINTOSC mode | 344 | |
| Supply Current (IDD), HFINTOSC mode | IDD | 0.7 | 1.2 | mA | VDD = 1.8V, FOSC = 16 MHz, HFINTOSC mode | 344 | |
| Supply Current (IDD), HFINTOSC mode | IDD | 1.1 | 1.8 | mA | VDD = 3.0V, FOSC = 16 MHz, HFINTOSC mode | 344 | |
| Supply Current (IDD), HFINTOSC mode | IDD | 1.4 | 2 | mA | VDD = 5.0V, FOSC = 16 MHz, HFINTOSC mode | 344 | |
| Supply Current (IDD), HFINTOSC mode 32 MHz | IDD | 2.2 | 3.4 | mA | VDD = 3.0V, FOSC = 32 MHz, HFINTOSC mode (Note 3) | 345 | |
| Supply Current (IDD), HFINTOSC mode 32 MHz | IDD | 3.2 | 3.6 | mA | VDD = 5.0V, FOSC = 32 MHz, HFINTOSC mode (Note 3) | 345 | |
| Power-down Base Current (IPD) | IPD | 18 | 37 | µA | VDD = 1.8V; WDT, BOR, FVR, and T1OSC disabled, all Peripherals Inactive; max at +85°C | 346 | |
| Power-down Base Current (IPD) | IPD | 20 | 42 | µA | VDD = 3.0V; WDT, BOR, FVR, and T1OSC disabled, all Peripherals Inactive; max at +85°C | 346 | |
| Power-down Base Current (IPD) | IPD | 22 | 45 | µA | VDD = 5.0V; WDT, BOR, FVR, and T1OSC disabled, all Peripherals Inactive; max at +85°C | 346 | |
| Input Low Voltage, I/O PORT with TTL buffer | VIL | 0.8 | V | 4.5V ≤ VDD ≤ 5.5V | 348 | ||
| Input High Voltage, I/O PORT with TTL buffer | VIH | 2 | V | 4.5V ≤ VDD ≤ 5.5V | 348 | ||
| Input Leakage Current, I/O ports | IIL | -125 | 125 | nA | VSS ≤ VPIN ≤ VDD, pin at high-impedance at 85°C | 348 | |
| Input Leakage Current, MCLR | IIL | -200 | 200 | nA | VSS ≤ VPIN ≤ VDD at 85°C | 348 | |
| Weak Pull-up Current | IPUR | 25 | 100 | 200 | µA | VDD = 3.3V, VPIN = VSS | 348 |
| Weak Pull-up Current | IPUR | 25 | 140 | 300 | µA | VDD = 5.0V, VPIN = VSS | 348 |
| Output Low Voltage, I/O ports | VOL | 0.6 | V | IOL = 8 mA, VDD = 5V; IOL = 6 mA, VDD = 3.3V; IOL = 1.8 mA, VDD = 1.8V | 348 | ||
| Capacitive loading, OSC2 pin | COSC2 | 15 | pF | In XT, HS and LP modes when external clock is used to drive OSC1 | 348 | ||
| Capacitive loading, all I/O pins | CIO | 50 | pF | 348 | |||
| Brown-out Reset Voltage | VBOR | 2.55 | 2.7 | 2.85 | V | BORV = 0 | 357 |
| Brown-out Reset Voltage | VBOR | 1.8 | 1.9 | 2.05 | V | BORV = 1 | 357 |
| Watchdog Timer Time-out Period (No Prescaler) | TWDTLP | 12 | 16 | 20 | ms | VDD = 3.3V-5V | 357 |
| Power-up Timer Period | TPWRT | 40 | 65 | 140 | ms | PWRTE = 0 | 357 |
| External CLKIN Frequency, high power EC mode | FOSC | 32 | MHz | EC Oscillator mode (high) | 352 | ||
| MCLR/VPP/RA5 high voltage programming pin voltage | VIHH | 8 | 9 | V | (Note 3, 4) | 349 | |
| Power-on Reset Release Voltage | VPOR | 1.6 | V | 341 | |||
| Power-on Reset Rearm Voltage, PIC16F1824/8 | VPORR | 1.4 | V | Device in Sleep mode | 341 | ||
| Thermal Resistance Junction to Ambient, 14-pin SOIC | θJA | 95.3 | °C/W | 14-pin SOIC package | 350 | ||
| Thermal Resistance Junction to Case, 14-pin SOIC | θJC | 31 | °C/W | 14-pin SOIC package | 350 | ||
| Maximum Junction Temperature | TJMAX | 150 | °C | 350 |
CAD (KiCad official)
- Symbol:
PIC16F1824T-I - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files:
pic16f1824t-i-etched.step/pic16f1824t-i-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pic16f1824t-i.step/pic16f1824t-i.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (441 pp, sha256
10baf2855904f668, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# PIC16F1824T-I
**Microchip Tech** · Microcontrollers (MCU/MPU/SOC) · SOIC-14
PIC16F1824T-I from Microchip Tech, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Positive supply; the PIC16F1824 operates from 1.8V to 5.5V. |
| 2 | RA5 | bidirectional | General purpose I/O with 25 mA high current sink/source; alternate functions include CLKIN/OSC1, T1OSI, T1CKI, P2A and CCP2 (CCP2/P2A location selectable via APFCON1). |
| 3 | RA4 | bidirectional | General purpose I/O; alternate functions include AN3, CPS3, OSC2/CLKOUT, T1OSO, CLKR, SDO, P2B and T1G, with CLKOUT taking output priority when enabled. |
| 4 | RA3 | input | General purpose input only; this pin is also MCLR (Master Clear with internal pull-up) and VPP (programming voltage). |
| 5 | RC5 | bidirectional | General purpose I/O; alternate functions include P1A, CCP1, RX/DT and MDCIN2. |
| 6 | RC4 | bidirectional | General purpose I/O; alternate functions include C2OUT, SRNQ, P1B, TX/CK and MDOUT. |
| 7 | RC3 | bidirectional | General purpose I/O; alternate functions include AN7, CPS7, C12IN3-, P2A, CCP2, P1C, SS and MDMIN. |
| 8 | RC2 | bidirectional | General purpose I/O; alternate functions include AN6, CPS6, C12IN2-, P1D, P2B, SDO and MDCIN1. |
| 9 | RC1 | bidirectional | General purpose I/O; alternate functions include AN5, CPS5, C12IN1-, SDA, SDI, P1C and CCP4. |
| 10 | RC0 | bidirectional | General purpose I/O; alternate functions include AN4, CPS4, C2IN+, SCL, SCK and P1D. |
| 11 | RA2 | bidirectional | General purpose I/O; alternate functions include AN2, CPS2, T0CKI, INT, C1OUT, SRQ, CCP3 and FLT0. |
| 12 | RA1 | bidirectional | General purpose I/O; alternate functions include AN1, CPS1, C12IN0-, VREF+, SRI, RX/DT and the ICSPCLK/ICDCLK programming clock. |
| 13 | RA0 | bidirectional | General purpose I/O; alternate functions include AN0, CPS0, C1IN+, VREF-, DACOUT, TX/CK and the ICSPDAT/ICDDAT programming data. |
| 14 | VSS | power_in | Ground reference. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-14 |
| Category | Embedded Processors & Controllers |
| Pins | 14 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Voltage on VDD with respect to VSS, PIC16F1824/8 | | -0.3 | | 6.5 | V | | 338 |
| Voltage on MCLR with respect to Vss | | -0.3 | | 9 | V | | 338 |
| Maximum current out of VSS pin | | | | 210 | mA | -40°C TA +85°C for industrial | 338 |
| Maximum current into VDD pin | | | | 170 | mA | -40°C TA +85°C for industrial | 338 |
| Clamp current | IK | | | 20 | mA | VPIN < 0 or VPIN > VDD | 338 |
| Ambient temperature under bias | | -40 | | 125 | °C | | 338 |
| Storage temperature | | -65 | | 150 | °C | | 338 |
| VDD Supply Voltage (VDDMIN, VDDMAX), PIC16F1824/8 | VDD | 1.8 | | 5.5 | V | FOSC ≤ 16 MHz | 341 |
| VDD Supply Voltage (VDDMIN, VDDMAX), PIC16F1824/8 | VDD | 2.5 | | 5.5 | V | FOSC ≤ 32 MHz (Note 2) | 341 |
| RAM Data Retention Voltage, PIC16F1824/8 | VDR | 1.7 | | | V | Device in Sleep mode | 341 |
| Fixed Voltage Reference Voltage for ADC | VADFVR | -8 | | 6 | % | 1.024V, VDD ≥ 2.5V | 341 |
| Fixed Voltage Reference Voltage for Comparator and DAC | VCDAFVR | -11 | | 7 | % | 1.024V, VDD ≥ 2.5V | 341 |
| VDD Rise Rate to ensure internal Power-on Reset signal | SVDD | 0.05 | | | V/ms | | 341 |
| Supply Current (IDD), LP oscillator mode | IDD | | 24 | 50 | µA | VDD = 1.8V, FOSC = 32 kHz, LP Oscillator mode, -40°C TA +85°C | 343 |
| Supply Current (IDD), LP oscillator mode | IDD | | 30 | 55 | µA | VDD = 3.0V, FOSC = 32 kHz, LP Oscillator mode, -40°C TA +85°C | 343 |
| Supply Current (IDD), LP oscillator mode | IDD | | 32 | 60 | µA | VDD = 5.0V, FOSC = 32 kHz, LP Oscillator mode, -40°C TA +85°C | 343 |
| Supply Current (IDD), LFINTOSC mode | IDD | | 21 | 58 | µA | VDD = 1.8V, FOSC = 31 kHz, LFINTOSC mode, -40°C TA +85°C | 344 |
| Supply Current (IDD), LFINTOSC mode | IDD | | 27 | 65 | µA | VDD = 3.0V, FOSC = 31 kHz, LFINTOSC mode, -40°C TA +85°C | 344 |
| Supply Current (IDD), LFINTOSC mode | IDD | | 28 | 70 | µA | VDD = 5.0V, FOSC = 31 kHz, LFINTOSC mode, -40°C TA +85°C | 344 |
| Supply Current (IDD), MFINTOSC mode | IDD | | 124 | 180 | µA | VDD = 1.8V, FOSC = 500 kHz, MFINTOSC mode | 344 |
| Supply Current (IDD), MFINTOSC mode | IDD | | 150 | 210 | µA | VDD = 3.0V, FOSC = 500 kHz, MFINTOSC mode | 344 |
| Supply Current (IDD), MFINTOSC mode | IDD | | 190 | 270 | µA | VDD = 5.0V, FOSC = 500 kHz, MFINTOSC mode | 344 |
| Supply Current (IDD), HFINTOSC mode | IDD | | 0.48 | 0.75 | mA | VDD = 1.8V, FOSC = 8 MHz, HFINTOSC mode | 344 |
| Supply Current (IDD), HFINTOSC mode | IDD | | 0.74 | 1.15 | mA | VDD = 3.0V, FOSC = 8 MHz, HFINTOSC mode | 344 |
| Supply Current (IDD), HFINTOSC mode | IDD | | 0.82 | 1.35 | mA | VDD = 5.0V, FOSC = 8 MHz, HFINTOSC mode | 344 |
| Supply Current (IDD), HFINTOSC mode | IDD | | 0.7 | 1.2 | mA | VDD = 1.8V, FOSC = 16 MHz, HFINTOSC mode | 344 |
| Supply Current (IDD), HFINTOSC mode | IDD | | 1.1 | 1.8 | mA | VDD = 3.0V, FOSC = 16 MHz, HFINTOSC mode | 344 |
| Supply Current (IDD), HFINTOSC mode | IDD | | 1.4 | 2 | mA | VDD = 5.0V, FOSC = 16 MHz, HFINTOSC mode | 344 |
| Supply Current (IDD), HFINTOSC mode 32 MHz | IDD | | 2.2 | 3.4 | mA | VDD = 3.0V, FOSC = 32 MHz, HFINTOSC mode (Note 3) | 345 |
| Supply Current (IDD), HFINTOSC mode 32 MHz | IDD | | 3.2 | 3.6 | mA | VDD = 5.0V, FOSC = 32 MHz, HFINTOSC mode (Note 3) | 345 |
| Power-down Base Current (IPD) | IPD | | 18 | 37 | µA | VDD = 1.8V; WDT, BOR, FVR, and T1OSC disabled, all Peripherals Inactive; max at +85°C | 346 |
| Power-down Base Current (IPD) | IPD | | 20 | 42 | µA | VDD = 3.0V; WDT, BOR, FVR, and T1OSC disabled, all Peripherals Inactive; max at +85°C | 346 |
| Power-down Base Current (IPD) | IPD | | 22 | 45 | µA | VDD = 5.0V; WDT, BOR, FVR, and T1OSC disabled, all Peripherals Inactive; max at +85°C | 346 |
| Input Low Voltage, I/O PORT with TTL buffer | VIL | | | 0.8 | V | 4.5V ≤ VDD ≤ 5.5V | 348 |
| Input High Voltage, I/O PORT with TTL buffer | VIH | 2 | | | V | 4.5V ≤ VDD ≤ 5.5V | 348 |
| Input Leakage Current, I/O ports | IIL | -125 | | 125 | nA | VSS ≤ VPIN ≤ VDD, pin at high-impedance at 85°C | 348 |
| Input Leakage Current, MCLR | IIL | -200 | | 200 | nA | VSS ≤ VPIN ≤ VDD at 85°C | 348 |
| Weak Pull-up Current | IPUR | 25 | 100 | 200 | µA | VDD = 3.3V, VPIN = VSS | 348 |
| Weak Pull-up Current | IPUR | 25 | 140 | 300 | µA | VDD = 5.0V, VPIN = VSS | 348 |
| Output Low Voltage, I/O ports | VOL | | | 0.6 | V | IOL = 8 mA, VDD = 5V; IOL = 6 mA, VDD = 3.3V; IOL = 1.8 mA, VDD = 1.8V | 348 |
| Capacitive loading, OSC2 pin | COSC2 | | | 15 | pF | In XT, HS and LP modes when external clock is used to drive OSC1 | 348 |
| Capacitive loading, all I/O pins | CIO | | | 50 | pF | | 348 |
| Brown-out Reset Voltage | VBOR | 2.55 | 2.7 | 2.85 | V | BORV = 0 | 357 |
| Brown-out Reset Voltage | VBOR | 1.8 | 1.9 | 2.05 | V | BORV = 1 | 357 |
| Watchdog Timer Time-out Period (No Prescaler) | TWDTLP | 12 | 16 | 20 | ms | VDD = 3.3V-5V | 357 |
| Power-up Timer Period | TPWRT | 40 | 65 | 140 | ms | PWRTE = 0 | 357 |
| External CLKIN Frequency, high power EC mode | FOSC | | | 32 | MHz | EC Oscillator mode (high) | 352 |
| MCLR/VPP/RA5 high voltage programming pin voltage | VIHH | 8 | | 9 | V | (Note 3, 4) | 349 |
| Power-on Reset Release Voltage | VPOR | | 1.6 | | V | | 341 |
| Power-on Reset Rearm Voltage, PIC16F1824/8 | VPORR | | 1.4 | | V | Device in Sleep mode | 341 |
| Thermal Resistance Junction to Ambient, 14-pin SOIC | θJA | | 95.3 | | °C/W | 14-pin SOIC package | 350 |
| Thermal Resistance Junction to Case, 14-pin SOIC | θJC | | 31 | | °C/W | 14-pin SOIC package | 350 |
| Maximum Junction Temperature | TJMAX | | 150 | | °C | | 350 |
## CAD (KiCad official)
- Symbol: `PIC16F1824T-I`
- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`
- 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files: `pic16f1824t-i-etched.step` / `pic16f1824t-i-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `pic16f1824t-i.step` / `pic16f1824t-i.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Microchip Tech datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590226785851252736) (441 pp, sha256 `10baf2855904f668`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/pic16f1824t-i-datasheet.pdf)