PIC16F1823-I

{
  "schema_version": 1,
  "type": "component",
  "slug": "pic16f1823-i",
  "title": "PIC16F1823-I",
  "brief": "Microchip Microcontrollers (MCU/MPU/SOC), SOIC-14. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.2.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "mcu",
    "pic16f1823-i"
  ],
  "component": {
    "mpn": "PIC16F1823-I",
    "manufacturer": "Microchip",
    "package": "SOIC-14",
    "pin_count": 14,
    "category": "MCU",
    "subcategory": "Microcontrollers (MCU/MPU/SOC)",
    "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/1ad890838de7b5ef659e4bcc33058e4d.pdf",
    "parts": {
      "symbol": "pic16f1823-i.kicad_sym",
      "footprint": "pic16f1823-i.kicad_mod",
      "model_3d": "pic16f1823-i-etched.glb",
      "model_3d_plain": "pic16f1823-i.glb",
      "model_3d_step": "pic16f1823-i-etched.step",
      "model_3d_step_plain": "pic16f1823-i.step",
      "lbr": "pic16f1823-i.lbr"
    },
    "distributor_links": {},
    "pins": [
      {
        "number": "1",
        "name": "VDD",
        "type": "power_in",
        "description": "Positive supply. 1.8V-5.5V for PIC16F1823, 1.8V-3.6V for PIC16LF1823. Decouple with a 0.1 µF ceramic to VSS at the pin."
      },
      {
        "number": "2",
        "name": "RA5/T1CKI/T1OSI/OSC1/CLKIN",
        "type": "bidirectional",
        "description": "GPIO PORTA bit 5. Multiplexed with Timer1 clock input (T1CKI), Timer1 oscillator input (T1OSI), primary oscillator input (OSC1), and external clock input (CLKIN). Programmable weak pull-up. IOC (interrupt-on-change) capable."
      },
      {
        "number": "3",
        "name": "RA4/AN3/CPS3/T1G/T1OSO/OSC2/CLKOUT/CLKR/SDO",
        "type": "bidirectional",
        "description": "GPIO PORTA bit 4. Muxed with ADC channel AN3, CapSense CPS3, Timer1 gate (T1G), Timer1 oscillator output (T1OSO), primary oscillator output (OSC2), FOSC/4 clock output (CLKOUT), reference clock (CLKR), and MSSP SPI SDO. IOC and weak pull-up capable."
      },
      {
        "number": "4",
        "name": "RA3/T1G/MCLR/VPP/SS",
        "type": "input",
        "description": "Input-only PORTA bit 3. Muxed with Timer1 gate (T1G), master clear reset (MCLR, active low), high-voltage programming supply (VPP), and MSSP SPI slave select (SS). IOC capable, programmable weak pull-up. When MCLR enabled by CONFIG this pin acts as active-low reset."
      },
      {
        "number": "5",
        "name": "RC5/CCP1/P1A/RX/DT/MDCIN2",
        "type": "bidirectional",
        "description": "GPIO PORTC bit 5. Muxed with ECCP capture/compare/PWM (CCP1/P1A), EUSART receive/asynchronous data (RX/DT), and Data Signal Modulator carrier input (MDCIN2). Programmable weak pull-up."
      },
      {
        "number": "6",
        "name": "RC4/C2OUT/SRNQ/P1B/TX/CK/MDOUT",
        "type": "bidirectional",
        "description": "GPIO PORTC bit 4. Muxed with comparator C2 output, SR Latch inverted Q (SRNQ), ECCP PWM output P1B, EUSART transmit/synchronous clock (TX/CK), and Data Signal Modulator output (MDOUT). Programmable weak pull-up."
      },
      {
        "number": "7",
        "name": "RC3/AN7/CPS7/C12IN3-/P1C/MDMIN",
        "type": "bidirectional",
        "description": "GPIO PORTC bit 3. Muxed with ADC channel AN7, CapSense CPS7, comparator C1/C2 inverting input C12IN3-, ECCP PWM output P1C, and Data Signal Modulator modulator input (MDMIN). Programmable weak pull-up."
      },
      {
        "number": "8",
        "name": "RC2/AN6/CPS6/C12IN2-/P1D/SDO/MDCIN1",
        "type": "bidirectional",
        "description": "GPIO PORTC bit 2. Muxed with ADC channel AN6, CapSense CPS6, comparator C1/C2 inverting input C12IN2-, ECCP PWM output P1D, MSSP SPI data out (SDO), and Data Signal Modulator carrier input (MDCIN1). Programmable weak pull-up."
      },
      {
        "number": "9",
        "name": "RC1/AN5/CPS5/C12IN1-/SDA/SDI",
        "type": "bidirectional",
        "description": "GPIO PORTC bit 1. Muxed with ADC channel AN5, CapSense CPS5, comparator C1/C2 inverting input C12IN1-, MSSP I2C data (SDA) and MSSP SPI data in (SDI). Programmable weak pull-up."
      },
      {
        "number": "10",
        "name": "RC0/AN4/CPS4/C2IN+/SCL/SCK",
        "type": "bidirectional",
        "description": "GPIO PORTC bit 0. Muxed with ADC channel AN4, CapSense CPS4, comparator C2 non-inverting input C2IN+, MSSP I2C clock (SCL) and MSSP SPI clock (SCK). Programmable weak pull-up."
      },
      {
        "number": "11",
        "name": "RA2/AN2/CPS2/C1OUT/T0CKI/FLT0/INT/SRQ",
        "type": "bidirectional",
        "description": "GPIO PORTA bit 2. Muxed with ADC channel AN2, CapSense CPS2, comparator C1 output, Timer0 clock input (T0CKI), ECCP fault input (FLT0), external interrupt input (INT), and SR Latch Q output (SRQ). IOC capable, programmable weak pull-up."
      },
      {
        "number": "12",
        "name": "RA1/AN1/VREF+/CPS1/C12IN0-/SRI/ICSPCLK/ICDCLK",
        "type": "bidirectional",
        "description": "GPIO PORTA bit 1. Muxed with ADC channel AN1, ADC/DAC positive reference (VREF+), CapSense CPS1, comparator C1/C2 inverting input C12IN0-, SR Latch Reset input (SRI), and in-circuit programming/debug clock (ICSPCLK/ICDCLK). IOC and weak pull-up capable."
      },
      {
        "number": "13",
        "name": "RA0/AN0/DACOUT/CPS0/C1IN+/TX/CK/ICSPDAT/ICDDAT",
        "type": "bidirectional",
        "description": "GPIO PORTA bit 0. Muxed with ADC channel AN0, 5-bit DAC output (DACOUT), CapSense CPS0, comparator C1 non-inverting input C1IN+, EUSART TX/CK, and in-circuit programming/debug data (ICSPDAT/ICDDAT). IOC and weak pull-up capable."
      },
      {
        "number": "14",
        "name": "VSS",
        "type": "power_in",
        "description": "Ground / negative supply reference. Connect to system ground; keep decoupling loop short with VDD."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://datasheet.lcsc.com/datasheet/pdf/1ad890838de7b5ef659e4bcc33058e4d.pdf",
        "pages": 422,
        "sha256": "6d6e6d04ac8bd7f6",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 14,
        "described": 14,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "pin1": {
      "pad": "1",
      "at": [
        -2.475,
        -3.81
      ],
      "corner": "top-left",
      "source": "silk-marker",
      "derived_from": "SOIC-14_3.9x8.7mm_P1.27mm@sha256:a885b619b22880c9",
      "mark": "drawn"
    }
  },
  "metadata": {
    "specs": {
      "Manufacturer": "Microchip",
      "Package": "SOIC-14",
      "Category": "MCU",
      "Pins": "14"
    }
  },
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "pic16f1823-i"
  ],
  "discovery_pitch": "PIC16F1823-I (Microchip) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "pic16f1823-i.kicad_sym",
    "pic16f1823-i.kicad_mod",
    "pic16f1823-i.glb",
    "pic16f1823-i.step",
    "pic16f1823-i-etched.step",
    "pic16f1823-i.lbr",
    "docs/hero.png",
    "docs/pic16f1823-i-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html"
  ],
  "visibility": {
    "public": true
  },
  "variants": [
    {
      "mpn": "PIC16F1823-II/P",
      "kind": "packaging"
    },
    {
      "mpn": "PIC16F1823-II/SL",
      "kind": "packaging"
    },
    {
      "mpn": "PIC16F1823-II/ST",
      "kind": "packaging"
    },
    {
      "mpn": "PIC16F1823-II/ML",
      "kind": "packaging"
    },
    {
      "mpn": "PIC16F1823-II/MV",
      "kind": "packaging"
    }
  ],
  "updated_at": "2026-09-25T04:22:00.431Z"
}