main
Ray Publish 0.1.0 4654129 7d ago
{
  "slug": "pic16f1508-i",
  "version": "0.1.0",
  "type": "component",
  "description": "Microchip Tech Microcontrollers (MCU/MPU/SOC), SSOP-20-208mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "embedded processors & controllers",
    "pic16f1508-i",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "pic16f1508-i.kicad_sym",
    "pic16f1508-i.kicad_mod",
    "pic16f1508-i.glb",
    "pic16f1508-i.step",
    "pic16f1508-i.lbr",
    "docs/hero.png",
    "docs/pic16f1508-i-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "pic16f1508-i-hero.glb",
    "pic16f1508-i-hero.overlay.json",
    "pic16f1508-i-etched.glb"
  ],
  "component": {
    "mpn": "PIC16F1508-I",
    "manufacturer": "Microchip Tech",
    "package": "SSOP-20-208mil",
    "pin_count": 20,
    "category": "Embedded Processors & Controllers",
    "subcategory": "Microcontrollers (MCU/MPU/SOC)",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588883464175702016",
    "parts": {
      "symbol": "pic16f1508-i.kicad_sym",
      "footprint": "pic16f1508-i.kicad_mod",
      "model_3d": "pic16f1508-i-hero.glb",
      "model_3d_plain": "pic16f1508-i-etched.glb",
      "model_3d_step": "pic16f1508-i-etched.step",
      "model_3d_step_plain": "pic16f1508-i.step",
      "lbr": "pic16f1508-i.lbr"
    },
    "distributor_links": {
      "lcsc": "C171840"
    },
    "distributor_check": {
      "checked_at": "2026-10-20T09:08:28Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "no match"
      },
      "mouser": {
        "pn": null,
        "status": "no match"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "VDD",
        "type": "power_in",
        "description": "Positive supply pin."
      },
      {
        "number": "2",
        "name": "RA5",
        "type": "bidirectional",
        "description": "General purpose I/O (TTL input, CMOS output) that also serves as the external clock input CLKIN in EC mode, Timer1 clock input T1CKI, NCO1 clock source input, and secondary oscillator connection SOSCI."
      },
      {
        "number": "3",
        "name": "RA4",
        "type": "bidirectional",
        "description": "General purpose I/O (TTL input, CMOS output) that also provides ADC channel AN3, secondary oscillator connection SOSCO, FOSC/4 CLKOUT output, and Timer1 gate input T1G."
      },
      {
        "number": "4",
        "name": "RA3",
        "type": "input",
        "description": "Input-only general purpose pin with IOC and weak pull-up; when MCLRE is set it is the MCLR Reset input with internal pull-up, and VPP is the high-voltage programming pin."
      },
      {
        "number": "5",
        "name": "RC5",
        "type": "bidirectional",
        "description": "General purpose I/O (TTL input, CMOS output) that also provides PWM1 output, CLC1 output, or CWG1A primary output."
      },
      {
        "number": "6",
        "name": "RC4",
        "type": "bidirectional",
        "description": "General purpose I/O (TTL input, CMOS output) that also provides comparator C2 output, CLC2IN1 input, CLC4 output, or CWG1B complementary output."
      },
      {
        "number": "7",
        "name": "RC3",
        "type": "bidirectional",
        "description": "General purpose I/O (TTL input, CMOS output) that also provides ADC channel AN7, comparator negative inputs C1IN3- and C2IN3-, PWM2 output, and CLC2IN0 input."
      },
      {
        "number": "8",
        "name": "RC6",
        "type": "bidirectional",
        "description": "General purpose I/O (TTL input, CMOS output) that also provides ADC channel AN8, NCO1 source output, CLC3IN1 input, and SPI slave select input SS (alternate location, selected via APFCON)."
      },
      {
        "number": "9",
        "name": "RC7/AN9/CLC1IN1/SDO",
        "type": "bidirectional",
        "description": "General purpose I/O (TTL input, CMOS output) that also provides ADC channel AN9, CLC1IN1 input, and SPI data output SDO."
      },
      {
        "number": "10",
        "name": "RB7/CLC3/TX/CK",
        "type": "bidirectional",
        "description": "General purpose I/O (TTL input, CMOS output) that also provides CLC3 output, EUSART asynchronous transmit TX, or EUSART synchronous clock CK."
      },
      {
        "number": "11",
        "name": "RB6/SCL/SCK",
        "type": "bidirectional",
        "description": "General purpose I/O (TTL input, CMOS output) that also provides I2C clock SCL (open-drain output) or SPI clock SCK."
      },
      {
        "number": "12",
        "name": "RB5/AN11/CLC4IN0/RX/DT",
        "type": "bidirectional",
        "description": "General purpose I/O (TTL input, CMOS output) that also provides ADC channel AN11, CLC4IN0 input, EUSART asynchronous receive RX, or EUSART synchronous data DT."
      },
      {
        "number": "13",
        "name": "RB4/AN10/CLC3IN0/SDA/SDI",
        "type": "bidirectional",
        "description": "General purpose I/O (TTL input, CMOS output) that also provides ADC channel AN10, CLC3IN0 input, I2C data SDA (open-drain), or SPI data input SDI."
      },
      {
        "number": "14",
        "name": "RC2/AN6/C1IN2-/C2IN2-",
        "type": "bidirectional",
        "description": "General purpose I/O (TTL input, CMOS output) that also provides ADC channel AN6 and comparator negative inputs C1IN2- and C2IN2-."
      },
      {
        "number": "15",
        "name": "RC1",
        "type": "bidirectional",
        "description": "General purpose I/O (TTL input, CMOS output) that also provides ADC channel AN5, comparator negative inputs C1IN1- and C2IN1-, PWM4 output, and NCO1 source output (alternate location, selected via APFCON)."
      },
      {
        "number": "16",
        "name": "RC0/AN4/CLC2/C2IN+",
        "type": "bidirectional",
        "description": "General purpose I/O (TTL input, CMOS output) that also provides ADC channel AN4, CLC2 source output, and comparator C2 positive input C2IN+."
      },
      {
        "number": "17",
        "name": "RA2",
        "type": "bidirectional",
        "description": "General purpose I/O with IOC and weak pull-up (Schmitt trigger input, CMOS output) that also provides ADC channel AN2, comparator C1 output, DAC1OUT2 output, Timer0 clock input T0CKI, external interrupt INT, PWM3 output, CLC1 output, and CWG1 fault input CWG1FLT."
      },
      {
        "number": "18",
        "name": "RA1",
        "type": "bidirectional",
        "description": "General purpose I/O with IOC and weak pull-up that also provides ADC channel AN1, ADC positive voltage reference input VREF+, comparator negative inputs C1IN0- and C2IN0-, CLC4 source input, and ICSP programming clock ICSPCLK (also ICD clock ICDCLK)."
      },
      {
        "number": "19",
        "name": "RA0",
        "type": "bidirectional",
        "description": "General purpose I/O with IOC and weak pull-up (TTL input, CMOS output) that also provides ADC channel AN0, comparator C1 positive input C1IN+, DAC1OUT1 output, and ICSP programming data ICSPDAT (also ICD data ICDDAT)."
      },
      {
        "number": "20",
        "name": "VSS",
        "type": "power_in",
        "description": "Ground reference pin."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: RA3 is input-only (TRIS always reads 1) and is also the MCLR/VPP pin; MCLR function depends on MCLRE; Several pins share multiple functions; only the default function is selected by reset and alternate ; The datasheet pinout text gives only 'Positive supply' and 'Ground reference' for VDD and VSS; the o"
        ],
        "pages_sent": 72,
        "cost_usd": 0.2742,
        "at": "2026-10-20T09:08:11"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588883464175702016",
        "pages": 401,
        "sha256": "e20039190e4bde55",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 20,
        "described": 20,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "pic16f1508-i.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          7.8,
          7.2,
          2.1
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "c9a01a276d0b4d9561efd58f2fcee56f52c1b6ab464ea7a0380cab4e87a924e6",
        "checked": "2026-10-20",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "pic16f1508-i-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          7.8,
          7.2,
          2.1
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "3742bf465af426eda870760284f2b9fac41f8310a84c894deb9e7e756774be31",
        "checked": "2026-10-20",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}