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PIC16C712-04

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Microchip Tech Microcontroller Units (MCUs/MPUs/SOCs), SOIC-18-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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3D Model

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Symbol & Footprint

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Datasheet

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Contents

README

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PIC16C712-04

Microchip Tech · Microcontroller Units (MCUs/MPUs/SOCs) · SOIC-18-300mil

PIC16C712-04 from Microchip Tech, in a SOIC-18-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 RA2/AN2 bidirectional PORTA bit 2 digital I/O (TTL input) or analog input 2.
2 RA3/AN3/VREF bidirectional PORTA bit 3 digital I/O (TTL input), analog input 3, or A/D reference voltage input.
3 RA4/T0CKI bidirectional PORTA bit 4 digital I/O with Schmitt Trigger input and open-drain output, or Timer0 external clock input.
4 MCLR/VPP input Active-low master clear (Reset) input with Schmitt Trigger buffer, also the programming voltage input.
5 VSS power_in Ground reference for logic and I/O pins.
6 RB0/INT bidirectional PORTB bit 0 digital I/O (TTL) with optional weak pull-up, or external interrupt input (Schmitt Trigger).
7 RB1/T1OSO/T1CKI bidirectional PORTB bit 1 digital I/O (TTL) with optional weak pull-up, Timer1 oscillator output connecting to a crystal, or Timer1 external clock input.
8 RB2/T1OSI bidirectional PORTB bit 2 digital I/O (TTL) with optional weak pull-up, or Timer1 oscillator input connecting to a crystal.
9 RB3/CCP1 bidirectional PORTB bit 3 digital I/O (TTL) with optional weak pull-up, or Capture1 input, Compare1 output, PWM1 output.
10 RB4 bidirectional PORTB bit 4 digital I/O (TTL) with optional weak pull-up and interrupt-on-change.
11 RB5 bidirectional PORTB bit 5 digital I/O (TTL) with optional weak pull-up and interrupt-on-change.
12 RB6 bidirectional PORTB bit 6 digital I/O (TTL) with optional weak pull-up and interrupt-on-change, also the ICSP programming clock (Schmitt Trigger).
13 RB7 bidirectional PORTB bit 7 digital I/O (TTL) with optional weak pull-up and interrupt-on-change, also the ICSP programming data (Schmitt Trigger).
14 VDD power_in Positive supply for logic and I/O pins.
15 OSC2/CLKOUT output Oscillator crystal output connecting to crystal or resonator; in RC mode outputs CLKOUT at 1/4 the OSC1 frequency, denoting the instruction cycle rate.
16 OSC1/CLKIN input Oscillator crystal input or external clock source input (ST buffer in RC mode, CMOS otherwise).
17 RA0/AN0 bidirectional PORTA bit 0 digital I/O (TTL input) or analog input 0.
18 RA1/AN1 bidirectional PORTA bit 1 digital I/O (TTL input) or analog input 1.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package SOIC-18-300mil
Category Single Chip Microcomputer/Microcontroller
Pins 18

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage (XT, RC, LP) VDD 4 5.5 V XT, RC and LP osc mode 75
Supply voltage (HS) VDD 4.5 5.5 V HS osc mode 75
Operating temperature commercial TA 0 70 °C commercial 75
Operating temperature industrial TA -40 85 °C industrial 75
Operating temperature extended TA -40 125 °C extended 75
Ambient temperature under bias -55 125 °C 73
Storage temperature -65 150 °C 73
Voltage on VDD with respect to VSS VDD -0.3 7.5 V 73
Voltage on MCLR with respect to VSS 0 13.25 V Note 2 73
Voltage on RA4 with respect to Vss 0 8.5 V 73
Total power dissipation (PDIP and SOIC) 1 W Note 1 73
Maximum output current sunk by any I/O pin 25 mA 73
Maximum output current sourced by any I/O pin 25 mA 73
RAM data retention voltage VDR 1.5 V 75
VDD rise rate (PWRT enabled) SVDD 0.05 V/ms PWRT enabled (PWRTE bit clear) 75
Brown-out Reset voltage trip point VBOR 3.65 4.35 V BODEN bit set 75
Supply current at 4 MHz IDD 0.8 2.5 mA FOSC = 4 MHz, VDD = 4.0V 75
Supply current at 20 MHz IDD 4 8 mA FOSC = 20 MHz, VDD = 4.0V 75
Power-down current, WDT enabled IPD 10.5 42 µA VDD = 4.0V, WDT enabled,-40C to +85C 75
Power-down current, WDT disabled 0 to 70C IPD 1.5 16 µA VDD = 4.0V, WDT disabled, 0C to +70C 75
Power-down current, WDT disabled -40 to 85C IPD 1.5 19 µA VDD = 4.0V, WDT disabled,-40C to +85C 75
Power-down current, WDT disabled -40 to 125C IPD 2.5 19 µA VDD = 4.0V, WDT disabled,-40C to +125C 75
Watchdog Timer module differential current IWDT 6 20 µA WDTE bit set, VDD = 4.0V 75
Brown-out Reset module differential current IBOR 200 µA BODEN bit set, VDD = 5.0V 75
LP oscillator operating frequency FOSC 0 200 kHz All temperatures 75
RC oscillator operating frequency FOSC 0 4 MHz All temperatures 75
XT oscillator operating frequency FOSC 0 4 MHz All temperatures 75
HS oscillator operating frequency FOSC 0 20 MHz All temperatures 75
Input low voltage, I/O ports with TTL buffer VIL 0.8 V 4.5V ≤ VDD ≤ 5.5V 77
Input high voltage, I/O ports with TTL buffer VIH 2 V 4.5V ≤ VDD ≤ 5.5V 77
Input leakage current, I/O ports IIL 1 µA Vss ≤ VPIN ≤ VDD, Pin at high-impedance 77
Input leakage current, MCLR, RA4/T0CKI IIL 5 µA Vss ≤ VPIN ≤ VDD 77
Input leakage current, OSC1 IIL 5 µA Vss ≤ VPIN ≤ VDD, XT, HS and LP osc modes 77
PORTB weak pull-up current IPURB 50 250 400 µA VDD = 5V, VPIN = VSS 77
Output low voltage, I/O ports VOL 0.6 V IOL = 8.5 mA, VDD = 4.5V, -40C to +85C 78
Output low voltage, I/O ports (extended) VOL 0.6 V IOL = 7.0 mA, VDD = 4.5V, -40C to +125C 78
Output low voltage, OSC2/CLKOUT VOL 0.6 V IOL = 1.6 mA, VDD = 4.5V, -40C to +85C 78
Output low voltage, OSC2/CLKOUT (extended) VOL 0.6 V IOL = 1.2 mA, VDD = 4.5V, -40C to +125C 78
Open-drain high voltage VOD 8.5 V RA4 pin 78
OSC2 pin capacitive loading COSC2 15 pF In XT, HS and LP modes when external clock is used to drive OSC1. 78
All I/O pins and OSC2 capacitive loading CIO 50 pF 78
Instruction cycle time TCY 200 ns TCY = 4/FOSC 81
A/D resolution NR 8 bit VREF = VDD = 5.12V, VSS ≤ VAIN ≤ VREF 86
A/D total absolute error EABS -1 1 LSb VREF = VDD = 5.12V, VSS ≤ VAIN ≤ VREF 86
A/D integral linearity error EIL -1 1 LSb VREF = VDD = 5.12V, VSS ≤ VAIN ≤ VREF 86
A/D differential linearity error EDL -1 1 LSb VREF = VDD = 5.12V, VSS ≤ VAIN ≤ VREF 86
A/D full scale error EFS -1 1 LSb VREF = VDD = 5.12V, VSS ≤ VAIN ≤ VREF 86
A/D offset error EOFF -1 1 LSb VREF = VDD = 5.12V, VSS ≤ VAIN ≤ VREF 86
A/D reference voltage VREF 2.5 V 86
Recommended impedance of analog voltage source ZAIN 10 kΩ 86
A/D conversion current (VDD) IAD 180 µA Standard; average current consumption when A/D is on. (Note 1) 86
VREF input current during acquisition IREF 10 1000 µA During VAIN acquisition. 86
VREF input current during conversion IREF 10 µA During A/D Conversion cycle 86
A/D clock period, TOSC based TAD 1.6 µs Standard, TOSC based, VREF ≥ 3.0V 87
A/D clock period, RC mode TAD 2 4 6 µs Standard, A/D RC Mode 87

CAD (KiCad official)

  • Symbol: PIC16C712-04
  • Footprint: Package_SO:SOIC-18W_7.5x11.6mm_P1.27mm
  • 3D model: SOIC-18-300mil (KiCad packages3D, STEP)
  • 3D model files: pic16c712-04-etched.step / pic16c712-04-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pic16c712-04.step / pic16c712-04.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (106 pp, sha256 e47d913a2758917f, retrieved 2026-10-24, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF