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PIC12LF1571T-I

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Microchip Tech Microcontrollers (MCU/MPU/SOC), SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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PIC12LF1571T-I

Microchip Tech · Microcontrollers (MCU/MPU/SOC) · SOIC-8

PIC12LF1571T-I from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD power_in Positive supply pin; the PIC12LF1571 operating voltage range is 1.8V to 3.6V per the Operating Characteristics.
2 RA5 bidirectional General purpose I/O that can alternately carry T1CKI, PWM1 (via APFCON), CWG1A (via APFCON), or CLKIN as the External Clock input in EC mode; RX/DT are on PIC12(L)F1572 only.
3 RA4 bidirectional General purpose I/O that can alternately carry AN3, C1IN1-, T1G, CWG1B, PWM2, or CLKOUT (FOSC/4 output), with the TX/CK alternates on PIC12(L)F1572 only.
4 RA3/MCLR/VPP input Input-only general purpose pin with IOC and weak pull-up that serves as the active-low MCLR Master Clear reset with internal pull-up, or as the VPP programming voltage input.
5 RA2 bidirectional General purpose I/O that can alternately carry AN2, C1OUT, T0CKI, CWG1FLT, CWG1A, PWM3, or the INT external interrupt input.
6 RA1/ICSPCLK bidirectional General purpose I/O that can alternately carry AN1, VREF+, C1IN0-, PWM1, or ICSPCLK, the ICSP programming clock input.
7 RA0/ICSPDAT bidirectional General purpose I/O that can alternately carry AN0, C1IN+, DACOUT, CWG1B, PWM2, or ICSPDAT, the bidirectional ICSP programming data pin.
8 VSS power_in Ground reference pin.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package SOIC-8
Category Embedded Processors & Controllers
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Ambient temperature under bias -40 125 °C 259
Storage temperature -65 150 °C 259
Voltage on VDD pin with respect to VSS (PIC12LF1571/2) VDD -0.3 4 V 259
Voltage on MCLR pin with respect to VSS -0.3 9 V 259
Voltage on all other pins with respect to VSS -0.3 V max printed as (VDD + 0.3V) 259
Maximum current on VSS pin 250 mA -40°C to +85°C (TA) 259
Maximum current on VDD pin 250 mA -40°C to +85°C (TA) 259
Sunk by any standard I/O pin 50 mA 259
Sourced by any standard I/O pin 50 mA 259
Clamp current IK 20 mA VPIN < 0 or VPIN > VDD 259
Operating ambient temperature, minimum (industrial) TA_MIN -40 °C Industrial temperature 260
Operating ambient temperature, maximum (industrial) TA_MAX 85 °C Industrial temperature 260
Supply voltage VDD VDD 1.8 3.6 V FOSC ≤ 16 MHz 262
Supply voltage VDD VDD 2.5 3.6 V FOSC ≤ 32 MHz (Note 3) 262
RAM data retention voltage VDR 1.5 V Device in Sleep mode 262
VDD rise rate SVDD 0.05 V/ms Ensures that the Power-on Reset signal is released properly 262
Supply current IDD IDD 35 44 µA VDD 1.8V; FOSC = 1 MHz, External Clock (ECM), Medium Power mode 264
Supply current IDD IDD 60 69 µA VDD 3.0V; FOSC = 1 MHz, External Clock (ECM), Medium Power mode 264
Supply current IDD IDD 116 132 µA VDD 1.8V; FOSC = 4 MHz, External Clock (ECM), Medium Power mode 264
Supply current IDD IDD 203 233 µA VDD 3.0V; FOSC = 4 MHz, External Clock (ECM), Medium Power mode 264
Supply current IDD IDD 5.5 11 µA VDD 1.8V; FOSC = 31 kHz, LFINTOSC, -40°C to +85°C 264
Supply current IDD IDD 7.3 12 µA VDD 3.0V; FOSC = 31 kHz, LFINTOSC, -40°C to +85°C 264
Supply current IDD IDD 111 151 µA VDD 1.8V; FOSC = 500 kHz, MFINTOSC 264
Supply current IDD IDD 133 176 µA VDD 3.0V; FOSC = 500 kHz, MFINTOSC 264
Supply current IDD IDD 0.5 0.6 mA VDD 1.8V; FOSC = 8 MHz, HFINTOSC 264
Supply current IDD IDD 0.7 0.9 mA VDD 3.0V; FOSC = 8 MHz, HFINTOSC 264
Supply current IDD IDD 0.7 0.8 mA VDD 1.8V; FOSC = 16 MHz, HFINTOSC 264
Supply current IDD IDD 1.1 1.2 mA VDD 3.0V; FOSC = 16 MHz, HFINTOSC 264
Supply current IDD IDD 2 2.4 mA VDD 3.0V; FOSC = 32 MHz, HFINTOSC (Note 3) 265
Supply current IDD IDD 1.7 1.9 mA VDD 3.0V; FOSC = 32 MHz, External Clock (ECH), High-Power mode (Note 3) 265
Supply current IDD IDD 2.2 5.9 µA VDD 1.8V; FOSC = 32 kHz, External Clock (ECL), Low-Power mode 265
Supply current IDD IDD 4.3 8.3 µA VDD 3.0V; FOSC = 32 kHz, External Clock (ECL), Low-Power mode 265
Supply current IDD IDD 18 25 µA VDD 1.8V; FOSC = 500 kHz, External Clock (ECL), Low-Power mode 265
Supply current IDD IDD 30 38 µA VDD 3.0V; FOSC = 500 kHz, External Clock (ECL), Low-Power mode 265
Base power-down current in Sleep IPD 0.02 0.6 µA VDD 1.8V; WDT, BOR and FVR disabled, all peripherals inactive, VREGPM = 1; max at +85°C 266
Base power-down current in Sleep IPD 0.025 0.8 µA VDD 3.0V; WDT, BOR and FVR disabled, all peripherals inactive, VREGPM = 1; max at +85°C 266
WDT current 0.3 0.8 µA VDD 1.8V; max at +85°C 266
WDT current 0.5 1.1 µA VDD 3.0V; max at +85°C 266
Input low voltage, I/O ports VIL 0.15 VDD D030A; 1.8V ≤ VDD ≤ 4.5V (printed as 0.15 VDD) 268
Input low voltage, Schmitt Trigger buffer VIL 0.2 VDD D031; 2.0V ≤ VDD ≤ 5.5V (printed as 0.2 VDD) 268
Input high voltage, Schmitt Trigger buffer VIH 0.8 VDD D041; 2.0V ≤ VDD ≤ 5.5V (printed as 0.8 VDD) 268
Input leakage current, I/O ports, +85°C IIL -125 125 nA D060; VSS to VDD pin voltage, pin at high-impedance, +85°C 268
Input leakage current, MCLR IIL -200 200 nA D061; VSS to VDD, pin at high-impedance, +85°C 268
Weak pull-up current IPUR 25 100 200 µA D070; VDD = 3.3V, VPIN = VSS 268
Output low voltage, I/O ports VOL 0.6 V D080; IOL = 6 mA, VDD = 3.3V 268
Capacitive loading on all I/O pins CIO 50 pF D101A; all I/O pins 268
Voltage on MCLR/VPP pin for high-voltage programming VIHH 8 9 V D110; (Note 2) 269
Supply current during programming IDDP 10 mA D111 269
VDD for bulk erase VBE 2.7 V D112 269
External clock frequency, low-power (ECL) FOSC 0.5 MHz OS01; External Clock (ECL); min printed as DC 272
External clock frequency, medium-power (ECM) FOSC 4 MHz OS01; External Clock (ECM); min printed as DC 272
External clock frequency, high-power (ECH) FOSC 20 MHz OS01; External Clock (ECH); min printed as DC 272
External CLKIN period TOSC 50 ns OS02; External Clock (EC) 272
Internal calibrated HFINTOSC frequency tolerance HFOSC -2 2 % VDD = 3.0V, TA = 25°C (Note 2); nominal 16.0 MHz 273
HFINTOSC wake-up from Sleep start-up time TWARM 5 15 µs HFINTOSC wake-up from Sleep 273
Brown-out Reset voltage, PIC12LF1571/2 VBOR 1.8 1.9 2.05 V BORV = 1 (PIC12LF1571/2) 276
Low-Power Brown-out Reset voltage VLPBOR 1.8 2.1 2.5 V LPBOR = 1 276
ADC integral error EIL -1.7 1.7 LSb VREF = 3.0V 278
ADC reference voltage VREF 1.8 V VREF = (VRPOS, VRNEG) (Note 4) 278
Thermal resistance junction to ambient, 8-pin SOIC JA 149.5 C/W 8-pin SOIC package 270

CAD (KiCad official)

  • Symbol: PIC12LF1571T-I
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: pic12lf1571t-i-etched.step / pic12lf1571t-i-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pic12lf1571t-i.step / pic12lf1571t-i.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (334 pp, sha256 8c2780e95ad8fcbd, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF